Reliable postprocessing improvement of van der Waals heterostructures

TL;DR

This paper presents a reliable post-processing method using thermal annealing and contact mode AFM to significantly enhance the electrical performance of van der Waals heterostructure devices by reducing interface corrugations and strain fluctuations.

Contribution

It introduces a straightforward post-fabrication surface treatment that consistently improves device quality and performance in van der Waals heterostructures, addressing variability issues.

Findings

Device performance improves after AFM treatment.

Both low temperature and room temperature properties are enhanced.

Statistical analysis confirms consistent improvements across multiple devices.

Abstract

The successful assembly of heterostructures consisting of several layers of different 2D materials in arbitrary order by exploiting van der Waals forces has truly been a game changer in the field of low dimensional physics. For instance, the encapsulation of graphene or MoS2 between atomically flat hexagonal boron nitride (hBN) layers with strong affinity and graphitic gates that screen charge impurity disorder provided access to a plethora of interesting physical phenomena by drastically boosting the device quality. The encapsulation is accompanied by a self-cleansing effect at the interfaces. The otherwise predominant charged impurity disorder is minimized and random strain fluctuations ultimately constitute the main source of residual disorder. Despite these advances, the fabricated heterostructures still vary notably in their performance. While some achieve record mobilities, others only possess mediocre quality. Here, we report a reliable method to improve fully completed van der Waals heterostructure devices with a straightforward post-processing surface treatment based on thermal annealing and contact mode AFM. The impact is demonstrated by comparing magnetotransport measurements before and after the AFM treatment on one and the same device as well as on a larger set of treated and untreated devices to collect device statistics. Both the low temperature properties as well as the room temperature electrical characteristics, as relevant for applications, improve on average substantially. We surmise that the main beneficial effect arises from reducing nanometer scale corrugations at the interfaces, i.e. the detrimental impact of random strain fluctuations.