Addressing Temporal Variations in Qubit Quality Metrics for Parameterized Quantum Circuits

TL;DR

This paper introduces training methods for parameterized quantum circuits that account for temporal variations in qubit quality, significantly enhancing their fidelity on noisy intermediate-scale quantum hardware.

Contribution

It proposes classical training methodologies for PQC that improve fidelity by addressing temporal variations in qubit quality metrics.

Findings

Fidelity improvements up to 42.5% on target NISQ hardware.

Training methods effectively mitigate temporal variations in qubit quality.

Enhanced robustness of PQC against hardware noise over time.

Abstract

The public access to noisy intermediate-scale quantum (NISQ) computers facilitated by IBM, Rigetti, D-Wave, etc., has propelled the development of quantum applications that may offer quantum supremacy in the future large-scale quantum computers. Parameterized quantum circuits (PQC) have emerged as a major driver for the development of quantum routines that potentially improve the circuit's resilience to the noise. PQC's have been applied in both generative (e.g. generative adversarial network) and discriminative (e.g. quantum classifier) tasks in the field of quantum machine learning. PQC's have been also considered to realize high fidelity quantum gates with the available imperfect native gates of a target quantum hardware. Parameters of a PQC are determined through an iterative training process for a target noisy quantum hardware. However, temporal variations in qubit quality metrics affect the performance of a PQC. Therefore, the circuit that is trained without considering temporal variations exhibits poor fidelity over time. In this paper, we present training methodologies for PQC in a completely classical environment that can improve the fidelity of the trained PQC on a target NISQ hardware by as much as 42.5%.

Equations

$$J(\theta )=\frac{1}{m}\sum _{i=1}^m(y_i-expectation(PQC(x_i,\theta ):Q_T){)}^2$$

$$\begin{array}{r}{\beta }_0=2\arcsin \frac{x[1{]}^2}{\sqrt[]{x[0{]}^2+x[1{]}^2}},{\beta }_1=2\arcsin \frac{x[3{]}^2}{\sqrt[]{x[2{]}^2+x[3{]}^2}}\\ {\beta }_2=2\arcsin \frac{\sqrt[]{x[2{]}^2+x[3{]}^2}}{\sqrt[]{x[0{]}^2+x[1{]}^2+x[2{]}^2+x[3{]}^2}}\\ A1={\beta }_2,A2=-A3=-{\beta }_1/2,A4=-A5=-{\beta }_0/2\end{array}$$

Full text

I Introduction

Quantum computing has observed a shift from being a purely academic exploration to a realistic industrial technology in recent years. However, the qubits have small coherence time (i.e., the quantum states are short-lived), the gate operations are imperfect, and the overall computation is extremely error-prone. Moreover, the near-term quantum devices offer a limited number of qubits without the costly feature of error correction. Due to these limitations, it is impossible to implement and test the target quantum algorithms (e.g. shor’s factorization, grover’s search, etc.) which have made quantum computing so attractive on a useful scale on these noisy intermediate-scale quantum ($NISQ$) hardware. In recent years, quantum routines have been developed which are inherently resilient to errors using variational/parameterized quantum circuits ($PQC$) [1, 2, 3]. $PQC$* is composed of a set of parameterized single and controlled single qubit gates. The parameters are iteratively optimized by a classical optimizer to attain a desired input-output relationship.* For example, RZ($\theta$) gate available in Rigetti 8Q-Agave hardware can be used to perform an arbitrary amount of rotation of a target qubit along Z-axis. By employing variational hybrid quantum/classical algorithms, $PQC$’s have been applied to accomplish both the generative and discriminative tasks in the field of quantum machine learning [4, 5, 6, 7, 8, 9]. For example, Romero et al. proposed a generative variational circuit that consists of two parts: a quantum circuit employed to encode a classical random variable into a quantum state, and a $PQC$ whose parameters are optimized to mimic a target probability distribution [9]. Schuld et al. [6] proposed a low-depth variational quantum algorithm for supervised learning where the input classical feature vectors are encoded into the amplitudes of a quantum system, and a quantum circuit of parameterized single and two-qubit gates together with a single-qubit measurement is used to classify the inputs. In [10], $PQC$’s are used to develop arbitrary high-fidelity quantum gates with the imperfect native gates of a target hardware.

Motivation: The trained $PQC$ is supposed to be noise resilient as the training is generally performed with the noisy hardware in the loop approach to address the impact of noise as shown in Figure 5(a) [11, 12, 13]. However, the quantum computers operate under extremely controlled environment (i.e. operating temperature is in millikelvin range [14]) and the qubit performance metrics that define the qubit quality (e.g. T1 relaxation time, T2 dephasing time, single-qubit gate error, multi-qubit gate error, readout error, etc.) experience significant fluctuations over time. Generally, the quantum computers (e.g., IBMQX4 and IBMQX2 from IBM) are periodically calibrated through randomized benchmarking [15] and the updated qubit quality metrics are reported for the users to validate their quantum experiments on any target hardware. The variations in the performance metrics of the qubits in IBMQX4 quantum computer is shown in Figure 2. The data has been collected over a 43 days period. The significant variations in the qubit quality metrics indicate that variational circuits that are trained at any particular time using the hardware in the loop training methodology may not show the desired behavior all the time.

The temporal variability at the output of a quantum circuit is expected for any arbitrary quantum circuit. As a motivational example, we have executed the workload shown in Figure 1(b) on 5-qubit IBMQX4 quantum computer (the coupling graph of the device is shown in Figure 1(a)) on 5 different occasions. The qubits are prepared in the basis state $\ket{00}$. Ideally, at the end of the execution period, the qubits will be in another basis state $\ket{10}$. A projective measurement on the target hardware is expected to generate a measurement of ’10’ most of the time. However, due to temporal variations of the qubit quality metrics, we have received significantly different outcomes at different points of time as shown in Figure 1(c). The y-axis shows the fidelity of the measurements (which is the % of the correct output for 1024 samples at a time). For circuits such as circuit-centric binary quantum classifiers based on $PQC$ (discussed in Section II), the final outcome is decided after analyzing the measurement distributions in a classical computer which can be completely wrong due to the temporal variations of the qubit quality metrics. Moreover, quantum computers are expected to operate in a client-server mode (for reliable hardware operation, the quantum computer is kept in extremely controlled environment). Training of an arbitrary $PQC$ of a client with the target server hardware in the loop approach becomes impractical as the training requires a considerable amount of time and the access to any target hardware through the client-server mode goes through a long wait queue. This is true for IBM and Rigetti that provide free access to their quantum computers through a cloud service accessible through qiskit and QCS, respectively. Hence, fully classical training of $PQC$ to address the variations in qubit quality metrics of a target hardware can be a challenging task.

Contributions: In this paper, we, (a) present a framework for simulating any given quantum workload for any target $NISQ$ hardware; (b) demonstrate training methodologies of $PQC$ and address their respective pros and cons; (c) present a fully classical heuristic training methodology for $PQC$ to address the temporal variations in qubit quality metrics; (d) used $PQC$ based circuit-centric quantum classifiers to demonstrate our solutions and verified their effectiveness on real quantum hardware from IBM.

The paper is organized as follows: the design methodologies of $PQC$ based circuit-centric binary quantum classifier are presented in Section II. The training methodologies and their pros/cons are is discussed in Section III. The framework for modeling circuit behavior on a generic $NISQ$ hardware is discussed in Section IV. We demonstrate the proposed training methodology for $PQC$ on two binary quantum classifiers in Section V. We conclude in Section VI.

II Binary Quantum Classifiers

II-A Quantum Computing Preliminaries

II-A1 Qubit and State Vector

Qubit is the building block of quantum computers. Besides storing classical bits 0 and 1, a qubit can be in a superposition of both 0 and 1 simultaneously. Qubit state is expressed with a ket ($\ket{.}$) notation which is represented by a column matrix known as state vector. A single qubit state $\ket{\psi}$ is described as $\ket{\psi}=a\ket{0}+b\ket{1}$. Here, $\ket{0}$ and $\ket{1}$ are known as computational basis states represented by $[1\hskip 5.69054pt0]^{T}$ and $[0\hskip 5.69054pt1]^{T}$ respectively (T stands for matrix transpose), and a and b are complex numbers s.t. $|a|^{2}+|b|^{2}=1$.

II-A2 Density Matrix

An alternate approach of representing qubit state is the density matrix ($\rho$) formalism which is expressed as $\rho=\sum_{i}p_{i}\ket{\psi}\bra{\psi}$ where $p_{i}$ is the probability of pure state and $\ket{\psi}$ is the density matrix. This representation is beneficial since qubit states may end up in a mixed state due to noise that can be expressed nicely using density matrix.

II-A3 Quantum Gates

Quantum gates are the operations that modulate the state of qubits and thus perform computations. Mathematically, quantum gates are represented by $2^{n}\times 2^{n}$ unitary matrices (n = number of qubits). Quantum gates can work on a single qubit (e.g., Pauli-X ($\sigma_{x}$) gate) or on multiple qubits (e.g., 2-qubit CNOT gate). When multiple gates work on different qubits, the overall unitary matrix can be calculated using tensor product ($\otimes$). For example, in Fig. 4(a) two U3 (native gate of IBMQX4) gates are working on qubit-1 and 0. Therefore, the overall gate matrix will be $U=U3\otimes U3$. The gate matrices of the quantum gates used in this work are shown in Figure 3.

II-A4 Expectation Value

Expectation value is the average of the eigenvalues, weighted by the probabilities that the state is measured to be in the corresponding eigenstate. In quantum computers, measurement of a qubit is performed in the so-called Z-basis or computational basis $\ket{0}$ and $\ket{1}$. These are the eigenvectors (eigenstates) of Pauli-Z ($\sigma_{z}$) operator with eigenvalues +1 and -1 respectively. For quantum computing, (a) a positive expectation value means that the measurements will yield more $\ket{0}$ than $\ket{1}$ , if a qubit prepared in identical setup is measured many times. The measurements will always yield $\ket{0}$ if the expectation value is exactly +1, (b) a negative expectation value means that the measurement outcomes will have more $\ket{1}$s than $\ket{0}$s. If the expectation value is exactly -1, the measurements will always yield $\ket{1}$, and c if the expectation value is 0, it means the qubit state is in a perfect superposition of both $\ket{0}$ and $\ket{1}$ (e.g., $\psi=(\ket{0}+\ket{1})/\sqrt{2}$) and large number of measurements will result in equal probabilities of $\ket{0}$ and $\ket{1}$.

For more clarity, suppose the state of a qubit after a quantum computation routine is $\ket{\psi}=0.8\ket{0}+0.6\ket{1}$ (note the higher amplitude of $\ket{0}$). The expectation value of Pauli-Z operator in this state $\ket{\psi}$ is $\bra{\psi}\sigma_{z}\ket{\psi}$ = 0.28, a positive expectation value which validates a in the above discussion. Figure 4(a) shows the variations in the expectation value of a target qubit with respect to a gate parameter ($\theta$).

II-B Classifier Basics

Binary classification is the task of classifying any input data into one of two possible groups. In supervised machine learning, this classification problem is solved by training a mathematical model ($f(x,\theta)$) with a properly labeled input data-set {($x_{1}$,$y_{1}$), ($x_{2}$,$y_{2}$), …. , ($x_{M}$,$y_{M}$)} where $x_{i}$ is the feature vector (can be multi-dimensional) of the $i^{\prime}th$ input data and $y_{i}$ is the associated label. The mathematical model predicts the class of any input data based on its features ($x$) and the parameters ($\theta$) of the model. The parameters ($\theta$) are updated iteratively until the model predictions are satisfactory over the input data-set.

In [6], a binary classification on quantum computers is proposed for classical data where a $PQC$ serves as the mathematical model. A state-preparation routine is required to encode the classical data and feed it to the $PQC$. The output is captured from a target qubit. During the training phase of the $PQC$, the parameters are updated iteratively based on the given input data-set so that the probability of getting 1 through a measurement of the target qubit for one class is maximized (and 0 for the other class).

II-C State Preparation

A state preparation circuit (which is applied to the qubits at ground state) is used to convert any classical input data to a quantum format so that quantum gates can be applied on the data and/or quantum speed-up can be exploited. The structure of this circuit depends on the chosen encoding scheme. A multitude of quantum encoding scheme of classical data have been proposed [16]. However, in this paper, we have utilized the basis encoding for parity classification and amplitude encoding for iris classification. These schemes are described below.

Basis Encoding: In this scheme, binary 0 (1) is encoded as computational basis state $\ket{0}$ ($\ket{1}$). For instance, a classical data x = 9 (binary $1001$) can be represented by 4-qubits (say, $Q_{3}Q_{2}Q_{1}Q_{0}$) where $Q_{3}$ and $Q_{0}$ ($Q_{2}$ and $Q_{1}$) are prepared in qubit state $\ket{1}$ ($\ket{0}$). The effect of the state-preparation routine can be written as - $U_{\phi}$ : x $\in$ { 0, 1 }n $\rightarrow$ $\ket{\psi_{x}}$.

Here, $U_{\phi}$ is the unitary transformation that prepares the desired quantum state representative of classical data. For IBM quantum computers, all qubits start from a $\ket{0}$ state. Therefore, quantum NOT gate (Pauli-X, $\sigma_{x}$) has to be applied on $Q_{3}$ and $Q_{0}$ whereas Identity gates are applied on $Q_{2}$ and $Q_{1}$ to prepare x = 9 state. Thus, for this case $U_{\phi}=\sigma_{x}\otimes I\otimes I\otimes\sigma_{x}$. Although, the scheme results in a trivial quantum state-preparation circuit (that only requires NOT and Identity gates) which is fairly easy to implement on existing quantum hardware, the required number of qubits may grow linearly with the number of input features (e.g., two 4-bit classical features will require 8 physical qubits).

Amplitude Encoding: In this scheme, normalized input vectors $x$ = ($x_{1}$, $x_{2}$, ….., $x_{N}$)${}^{T}\in\mathbb{R}$ of dimension $N$ = $2^{n}$ are associated with the amplitudes of a $n$ qubit state $\ket{\psi_{x}}$ ($U_{\phi}$ : x $\in$ $\mathbb{R}$ $\rightarrow$ $\ket{\psi_{x}}$ = $\sum_{i=1}^{N}$ $x_{i}$ $\ket{i}$). Example: The state ($\psi$) of a 2-qubit quantum system, due to superposition, is a linear combination of all possible computational basis state i.e. $\psi$ can be written as $a\ket{00}+b\ket{01}+c\ket{10}+d\ket{11}$ such that $\sqrt{a^{2}+b^{2}+c^{2}+d^{2}}=1$. Suppose, we have a classical input vector $x=\{1,2,3,4\}$. After normalizing the input vector, we get $x_{norm}=\{0.183,0.365,0.547,0.730\}$. The amplitude encoding scheme will encode this normalized classical input vector entries as the amplitude of the computational basis states of the whole quantum system such that state $\psi$ becomes $0.183\ket{00}+0.365\ket{01}+0.547\ket{10}+0.730\ket{11}$.

In this scheme, the number of qubits grows only logarithmically with the dimension of the classical input vectors (e.g. for the above example, only $log_{2}(4)=2$ qubits are required to encode 4 classical values). Furthermore, multiple inputs in superposition state can be processed simultaneously leading to potential speed-up in computation. Mathematically, quantum algorithms that are only polynomial in the number $n$ of qubits can perform computations on the $2^{n}$ amplitudes leading to a poly-logarithmic processing time. However, the encoding scheme results in a non-trivial state-preparation circuit which can be unsuitable for existing resource limited quantum hardware.

II-D Model Circuit

The model circuit is a parameterized unitary transformation $U_{\theta}$ (where $\theta$ is a set of trainable variables) that acts as the mathematical model for the classification task. The model circuit transforms encoded state $\ket{\psi_{x}}$ to another state, say, $\psi^{\prime}$ ($\ket{\psi^{\prime}}$ = $U_{\theta}$ $\ket{\psi_{x}}$). Generally, the model circuit has a layered architecture. Each layer can have identical or dissimilar constructs. A single layer consists of a parametric and an entanglement sub-layer as shown in Figure 4(b). The parametric sub-layer consists of the parametric single qubit gates ($PG$($\theta$) in Figure 4(b)). These parameters ($\theta$) are updated during training in an iterative fashion. The entanglement sub-layer consists of multi-qubit gates ($MQ$ gates shown in Figure 4(b)) which create a dependency between the target qubit and all other qubits in the circuit. The state preparation and model circuit is executed, the state of the target qubit is measured, and these execution and measurement operations are repeated multiple times. The measured distribution is analyzed in a classical computer to determine the class of a single input during inferencing.

II-E Design Considerations

The selection of gates for the model circuit depends on the available native gates of the target NISQ hardware. For instance, Rigetti 8-Q Agave quantum hardware only supports parametric single-qubit RZ($\theta$) operation with a single rotational parameter ($\theta$). IBMQX4 and IBMQX2 supports parametric single-qubit U3($\theta$, $\phi$, $\lambda$) operation with 3 rotational parameters. The entanglement is realized by applying multi-qubit unitaries on qubits (multi-qubit gates like CNOT or CZ). IBM quantum computers support two-qubit CNOT gates between neighbouring qubits and Rigetti 8-Q Agave supports two-qubit CZ gates. Tree-like structures ($TTN$) have been proposed for the entanglement sub-layer as shown in Figure 4(c) [17]. $MERA$’s are similar to $TTN$’s, but make use of additional unitary transformations to effectively capture a broader range of quantum correlations as shown in Figure 4(c) [18]. A CNOT gate between two neighbouring qubits in entanglement sub-layer in Rigetti hardware is compiled to 6 unitary transformations resulting in a manifold increase of the depth of the model circuit. Moreover, the CNOT’s are allowed in limited directions in hardware such as, IBMQX4 or IBMQX2 which is known as the coupling constraint (e.g., the directional coupling graph of IBMQX4, Figure 1(a)). If the model circuit has a CNOT gate that violates the coupling constraint, a swap insertion procedure is executed during the compilation process to ensure that a desired CNOT operation takes place between two target qubits which also increases the depth of the circuit significantly [19]. Higher-depth circuits are more susceptible to decoherence induced errors which is the prominent source of error for qubits with a short lifetime. Therefore, the entanglement sub-layer structure should be chosen based on the available native gates and coupling graph with a goal to minimize the depth of the circuit.

III Training of $PQC$

Training of a model circuit ($PQC$, Figure 4(b)) for binary classification can follow three disparate strategies as described below.

III-A Existing Approaches

Two classes of $PQC$ training proposals exist in the literature:

i) Train the $PQC$ in a hardware-in-the-loop fashion. Hereafter, we term this approach as $app01$. In this approach, the $PQC$ is executed on a real quantum computer. For a certain input, the output is measured and then the measured output is post-processed in a classical computer. Statistical techniques such as, Kullback-Leibler (KL) divergence method is used to calculate the disparity between the target distribution and the measured distribution (hence the cost) to update the parameters with any classical optimization techniques such as stochastic gradient descent or particle swarm optimization etc. [11, 13, 12]. Then, the $PQC$ is executed again with updated parameters and process iterates until measured output matches target output up to a certain threshold. While it may seem to be an ideal approach, the technique is plagued with certain impediments. First, qubits quality changes over time (Fig. 2) which means that a trained $PQC$ on a certain day may not show optimal behavior over time due to qubit specification drift. Second, the quantum computers are expected to operate in a client-server fashion. Iterative training scheme may get prohibitively lengthy. Moreover, unlike classical bit states, intermediate quantum-mechanical states cannot be saved in a memory for computation at a later stage since the saved states will be lost due to decoherence.

ii) Simulation based training of the $PQC$ where a model quantum computer is simulated (we name it $app02$). The simulation results in the expectation value of the result qubit which is then compared with target expectation value to calculate the cost. Now, we can define the following cost-function to iteratively update the parameters of the $PQC$ (Figure 5(b)) to solve the binary classification problem (described for the hybrid approach) [6]:

[TABLE]

where $m$ is the batch-size, $y_{i}$ is the label of the $i^{\prime}th$ data in the batch (data are labeled as -1 and +1 for class A and class B respectively), $x_{i}$ is the $i^{\prime}th$ input, and ’expectation(PQC($x_{i}$,$\theta$):$Q_{T}$)’ is the expectation value of the target qubit ($Q_{T}$) for the $i^{\prime}th$ input and current values of the $\theta$. The target is to minimize the cost. Gradient descent technique is applied to achieve the optimization goal where the partial derivatives of the cost function (Equation 1) with respect to the circuit parameters are calculated using numerical differentiation [20].

In this approach, the client need not wait for the server (quantum hardware) to train and get the parameters of $PQC$. However, the simulation models an ideal (i.e., without noise) quantum computer whereas quantum computers are noisy (and noise behavior shows temporal variation) as pointed out in Section I. Therefore, the parameter optimization without considering noise may not give optimal result during inferencing phase in the real noisy quantum computer.

III-B Proposed Approach: Classical Training with Noise Effects

To deal with the noisy hardware related dependency of the trained $PQC$, we propose to update the parameters where the expectation values are calculated with modeled noise behavior of a target hardware with our noisy quantum hardware simulation framework (described in Section IV). The cost function remains same as in Equation 1. To address the stochastic behavior of the noise sources as evident from Figure 2, we use the average value of the qubit quality metrics collected over a significant amount of time (43 days) to optimize the $PQC$ parameters. Before averaging, outliers are removed from the data-set using an interquartile range rule [21]. We term this approach as $app03$. It is expected that circuits optimized with $app03$ will perform better than circuits optimized with $app01$ but executed on a different day and $app02$. In Section V will provide sufficient evidence behind this claim, both from simulation and real quantum computer.

IV Modeling and Simulation Setup

IV-A Modeling of Noisy Quantum System

IV-A1 Gate Error

To simulate 1-qubit and 2-qubit gate errors, depolarizing noise channel is applied. Under depolarizing noise, the qubit retains its state with a probability of $(1-p)$ (p = probability of error) and undergoes X (bit-flip), Z (phase-flip) and Z (bit-phase-flip) errors with a probability of $(p/3)$ each.

IV-A2 T1 Relaxation

T1 relaxation is simulated with amplitude damping channel. Note that the T1 relaxation affects only the state $\ket{1}$ (i.e., $\ket{1}\rightarrow\ket{0}$) leaving state $\ket{0}$ invariant. Reported T1 times are converted to probability (of no error) using the formula $p=exp(-t/T1)$ where t is the time of operation that depends on the gate-time of a particular quantum computing hardware. For example, for IBMQX4 quantum computer 1-qubit U2 gate-time is about $60ns$ [22].

IV-A3 T2 Dephasing

T2 dephasing is simulated with phase damping channel. Phase damping is a quantum-mechanical phenomenon and therefore difficult to comprehend intuitively. Mathematically, the off-diagonal elements of a density matrix (representing the qubit state) decay to 0 due to T2 dephasing or phase damping. For example, Bell state ($(\ket{00}+\ket{11})/\sqrt{2}$) is an example of entangled state. If the qubits in Bell state undergo dephasing then eventually the off-diagonal terms in the density matrix become zero and entangled qubits end up in a mixed state. Entanglement is believed to be one of the key properties that fuel quantum computers’ computing ability and dephasing is detrimental to that. Reported T2 times are converted to probability (of no error) using the formula $p=exp(-t/T2)$ where t is the time of operation.

IV-A4 Operator-sum Representation

To simulate the effect of noise on the quantum computation, we adopt the operator-sum representation using the appropriate Kraus operators [23]. In this representation, a quantum operation $\mathcal{E}()$, that maps the input state $\rho_{in}$ (in density matrix format) to output state $\rho_{out}$ such that $\rho_{in}\mapsto\mathcal{E}(\rho_{in})=\rho_{out}=\sum_{k}E_{k}\rho_{in}E_{k}^{\dagger}$. $E_{k}$ is called the operation element. By choosing appropriate operation elements the operator-sum representation can be used to compute the output after applying a gate on a qubit.

Likewise, if appropriate Kraus operators are chosen as operation elements, the operator-sum representation can be used to simulate the effect of different errors on a qubit state. In this paper, we emulate the noisy quantum-processing-units behavior with gate-error and T1 relaxation and T2 dephasing with suitable Kraus operators (listed in Figure 6).

IV-A5 Simulation Flow

Figure 7(a) shows the schematic of the Python-based simulation platform. We use modules from Qutip [24] package to execute matrix operations pertinent to quantum computation. To simulate the behavior of a real quantum device, the simulator takes: (i) the input states of the qubits in density matrix format, (ii) 1-qubit gate error probabilities for each qubit, (iii) 2-qubit gate error probabilities for each allowed qubit pair, (iv) T1 relaxation times, (v) T2 dephasing times, (vi) 1-qubit and 2-qubit gate times and, (vii) a quantum program compiled with native gate-sets of a specific hardware. We primarily used IBMQX4 quantum processing units reported specifications [22]. However, it can simulate another quantum processor (e.g., Rigetti ASPEN) if appropriate items (ii) - (vii) are fed.

The simulator reads the quantum program and executes each gate instruction. First, an ideal gate is applied to the qubit states followed by the errors in the sequence gate error, T1 and T2 error. The real quantum device (e.g., IBMQX4) reports amplitudes of pure states as the output. However, the simulator outputs a density matrix ($\rho_{out}$) which contains the result in a possible mixed state. Therefore, the output density matrix is then eigen-decomposed with pure state vectors as eigenvectors. The resulting eigenvalues are the amplitudes of each pure state. For example, if you consider a 2-qubit system, it has 4 possible pure state vectors ($\psi$) i.e. $\ket{00}$, $\ket{01}$, $\ket{10}$ and $\ket{11}$ (each vector is $4\times 1$). If $\lambda$ is the eigenvalue, then solving $\rho_{out}.\ket{\psi}=\lambda.\ket{\psi}$ will give $\lambda$ and this operation is the eigen-decomposition. The operation has to be repeated for all the pure state vectors (4 in this case) to get all the corresponding eigenvalues (pure state amplitudes). Finally, decomposed state vectors are fed into the expectation value calculator to calculate the expectation value of a qubit ($\langle E\rangle=\bra{\psi}\sigma_{z}\ket{\psi}$).

To validate the model, we simulated the 4-layer IRIS classifier (Fig. 13) as the test circuit using our model with IBMQX4 [22] specs and the program compiled in IBM native gate-set. The same circuit was executed on IBMQX4 on the same day to get real device results. The comparison between model data and real-device data is shown in Figure 8 (IBMQX4 probability of correct output = correct trials/total trials) for 12 different inputs. The model exhibits an average error of about $\approx 7.2\%$.

IV-B Validation Setup

IV-B1 Data Sources

In order to validate the effectiveness of our proposed training methodology, we have picked, i) 4-bit parity classification problem (which can be also thought of as a high-fidelity 4-qubit parity gate realization problem using $PQC$ [10]) with 16 known inputs/outputs combinations with two output classes (even and odd parity), and, ii) iris classification which is probably the best-known database in pattern recognition literature. The iris data-set contains three different classes (Setosa, Versicolour, and Virginica) of 50 samples per class. Each sample has four distinct features. To convert the iris classification problem into a binary classification task, we have selected 100 samples from Setosa and Versicolour classes.

IV-B2 Evaluation Method

Although parameterized quantum circuits can minimize the effects of noise, it cannot suppress it altogether. Therefore, the expectation values cannot be optimized to exactly -1/+1 values for all the inputs during the $PQC$ training period which indicates that a measurement is not guaranteed to result in the desired class output (0/1) for a certain input. Thus, the same circuit is executed multiple times (known as shots in IBMQX) and the target qubit is measured in each trial to get a distribution or ratio of 1s to 0s in the output. For binary classification, a large ratio e.g., $>$1 ($<$1) indicates the input belongs to the class represented by logic ’1’ (’0’). Example: A trained parity classifier is executed 1024 times on 4-qubits ($Q_{3}Q_{2}Q_{1}Q_{0}$) of IBMQX4 with input state $Q_{3}Q_{2}Q_{1}Q_{0}=0100$ (note the input has odd number of 1s i.e. odd-parity) with $Q_{0}$ being the result/target qubit. The execution resulted in a distribution of ‘0000’: 762 times and ‘0001’ 262 times. The ratio of 1s to 0s of the target qubit is 0.34 ($<1$) which indicates class belongs to logic ’0’ or odd parity (alternately, correct output ‘0’/incorrect output ‘1’ = 2.9 $>1$). In an ideal noise-less quantum computer, this ratio of 1s to 0s would have been 0. However, a class decision cannot be taken with confidence when the ratio is close to 1. In a series of measurements, the goal is to get a high ratio value between the correct and the incorrect outputs from a noisy device. The ratio between the correct and incorrect outputs is also a representation of the fidelity of the circuit.

It is to be noted, all the circuit examples presented in this paper has two phases: (i) parameter optimization phase or the training phase and (ii) execution phase or the result phase. We propose a heuristic approach for parameter optimization or training and show the effectiveness of our method by getting more optimal results compared to existing approaches (Section III-A) in the execution phase.

V Results and Discussions

V-A Test-circuit: Parity Classifier

The 4-bit binary inputs for the parity classification is encoded to four qubits using the basis encoding scheme (Section II). Parametric $U3(\theta,\phi,\lambda)$ gates of IBMQX4 have been used as the parametric gates of the model circuits. The ‘0’ outcomes (odd parity), and ‘1’ outcomes (even parity) have been labeled as +1 and -1 respectively for training based on Equation 1 using stochastic gradient descent ($SGD$) technique.

We have performed the parameter optimization of the model circuits using three different strategies, $app01$, $app02$ and $app03$ described in Section III and tested the performance of the optimized circuits in both real quantum computer, IBMQX4 and in simulation. The cost (m = 16 in Equation 1) over the entire input data-set during the training period ($app02$ and $app03$) is shown in Figure 10(a)&(b). TTNP2L and TTNN2L stand for the cost of two-layer TTN architectures during training for target ideal(pure) and noisy hardware respectively. However, it is to be noted that we adopted a simulated hardware-in-the-loop approach to mimic $app01$ due to interrupted and limited access to the real quantum computer. In this simulated approach, we substitute the $NISQ$ computer with our noisy quantum computer simulation framework (described in Section IV) and use the error specifications of a respective day to optimize the $PQC$ parameters.

Note that we have used only 100 iterations of $SGD$ for all the circuits over all the training approaches. The terminal cost, in the parameter optimization or training phase, after 100 iterations are smaller for $app02$ (as evident from Figure 10). However, it does not indicate that the trained $PQC$’s would perform better than the ones from $app03$ in the execution phase as the noise characteristics of the real hardware has not been taken into consideration during the optimization procedure for $app02$. In following paragraphs, we show that on a real device $app03$ will always outperform $app02$ which is substantiated with experiments on a real quantum computer.

Fig. 11 reports the performance (ratio of correct to incorrect outputs) of a binary classifier circuit with 1-layer TTN topology (Fig. 9) on IBMQX4. The $PQC$ generated from the $app01$ approach performed best in terms of the ratio of the correct and incorrect outcome over 1024 repeated measurements on the given day (the day on which the parameters were optimized) as evident from Figure 11 (TTN_Noisy). The average of the ratios (TTN_Noisy) was found 4.92. However, when the same circuit is executed on a different day ((TTN_NoisyDD in Figure 11)), it shows random behavior with substantially degraded performance in some cases (average of the ratios: 4.02). This trend validates one of our argument against $app01$ stated in Section III i.e. parameters optimized at one time may not be optimal at a different time.

The optimized circuit for the $app02$ approach performed poorly (average of the ratios: 3.45) over the entire input data-set (TTN_Pure in Figure 11). From the figure, it is evident that the circuit optimized with $app03$ consistently gives better performance than TTN_Pure and TTN_NoisyDD corroborating our claim in Section III. The ratio of the correct and incorrect outcome for all possible inputs are significantly higher (average of the ratios: 4.31) for the $app03$ approach. It is to be noted TTN_Pure, TTN_NoisyDD and TTN_NoisyAvg data are collected on the same day from IBMQX4.

We further substantiate our claim through simulation with the real hardware being substituted with our NISQ computer simulator in Section IV. Two topologies of the parity classifier model circuits ($TTN$ and $ALT$) have been chosen as shown in Figure 9(b)&(c) both of which satisfies the coupling graph of the IBMQX4 hardware shown in Figure 1(a). For each topology, both single-layer and double-layer flavor is simulated i.e. a total of 4 test circuits are simulated. The circuits are optimized with $app02$ (TTNP1L, TTNP2L, ALTP1L, and ALTP2L) and $app03$ (TTNN1L, TTNN2L, ALTN1L, and ALTN2L) to show the superiority of the proposed approach $app03$.

Figure 12 shows the aggregate actual cost over the entire input data-set for the trained $PQC$’s ($app02$ - TTNP1L, TTNP2L, ALTP1L, ALTP2L and $app03$ - TTNN1L, TTNN2L, ALTN1L, ALTN2L) for a set of qubit quality metrics data (error specification) of IBMQX4 collected over a 43 days period. The cost here can be interpreted as a measure of the difference between the ideal (expected) result and the result with noise. The lesser the cost the closer the result is to expected. The actual cost for the $app03$ is consistently smaller than the $app02$. For instance, the average cost over the entire input data-set for the 43 days period for TTNP1L ($app02$) is 0.042 which is 23.53% larger than the average cost (0.034) for TTNN1L($app03$).

Thus, both real computer experiments and simulations support our proposed $PQC$ parameter optimization technique considering the noise in real $NISQ$ devices. We later executed the optimized $PQC$’s for $app02$ (TTNP1L,TTNP2L) and $app03$ (TTNN1L,TTNN2L) on IBMQX4 for 100 different times with randomly chosen inputs (1024 shots per time) and the cumulative probability ($CP$) distribution of the ratio’s of the correct/incorrect outputs ($r$) are shown in Figure 15. The higher ratio values for any given cumulative probability for $app03$ (e.g. TTNN1L $\rightarrow$ $r$ = 5.24 for $CP$ = 0.6) than $app02$ (e.g. TTNP1L $\rightarrow$ $r$ = 4.36 for $CP$ = 0.6) in Figure 15 substantiate our previous claim that the $app03$ optimized $PQC^{\prime}s$ would outperform $app02$ on a target quantum hardware. The average value of $r$ for all the $app03$ $PQC$’s were found to be 21.91% higher than $app02$ for the TTN parity classifiers.

V-B Test-circuit: Iris Classifier

We prove our proposal with few more test circuits from IRIS classifier category (Fig. 13). The state preparation circuit has been coded according to the amplitude encoding scheme presented in [25]. We have decomposed the controlled Y-axis rotations to native gates available on IBMQX4 [26]. The four classical features in a single iris sample are normalized (x[0:3]) as in Section II-C and then used to compute the angles ($A_{1}$,…,$A_{5}$) of the state preparation circuit shown in Figure 13(a).

[TABLE]

The model circuit is composed of multiple layers of parametric $U3(\theta,\phi,\lambda)$ gates and CNOT gates shown in Figure 13(b). We have used two different flavors of the model circuit (4 layers and 6 layers) for validation. The circuit has 6 direct mappings available on IBMQX4 which is shown in Figure 13(c). The samples in the Setosa and Versicolour classes are labeled +1 and -1 respectively for training the model circuit.

The training is done based on the $app02$ (IRISP4L, IRISP6L) and the $app03$ (IRISN4L, IRISN6L) approach with mini-batch gradient descent optimization scheme (batch size = 5 in Equation 1). The cost curves during the training (100 iterations) are shown in Figure 14(a). In Figure 14(b), we have shown the actual cost (calculated using our noisy hardware simulation framework) over the entire data-set for 43 days of data of the qubit quality metrics of IBMQX4. The actual cost has been consistently smaller for the $app03$ approach as evident from Figure 14(b). The average cost over the 43 sets of data for IRISP6L ($app02$) has been found to be 0.56 which is 21.7% larger than the average cost (0.46) for IRISN6L ($app03$). We have executed the trained $PQC$’s on IBMQX4 hardware for the entire iris dataset and the resulting cumulative probability of the ratio’s of the correct and incorrect outputs are shown in Figure 15. The ratio values for $app03$ (IRISN4L,IRISN6L) are considerably higher than $app02$ (IRISP4L,IRISP6L) for similar values of the cumulative probability. The average value of $r$ for all the $app03$ $PQC$’s was found to be 42.5% higher than $app02$ for the iris classifiers.

VI Conclusions

We presented the shortcomings of current training approaches for parameterized quantum circuits ($PQC$) and proposed a fully classical training methodology for target $NISQ$ hardware to address the impact of temporal variations in qubit quality metrics. We present a simulation framework to model the circuit behavior on a target noisy quantum hardware. We validate our proposed solutions through comprehensive simulations and experiments on a real quantum device (IBMQX4) of two quantum classifiers built with $PQC$. The proposed methodology can improve the performance of any $PQC$ based quantum application on a target $NISQ$ hardware.