# High-Throughput CNN Inference on Embedded ARM big.LITTLE Multi-Core   Processors

**Authors:** Siqi Wang, Gayathri Ananthanarayanan, Yifan Zeng, Neeraj Goel, Anuj, Pathania, Tulika Mitra

arXiv: 1903.05898 · 2021-02-03

## TL;DR

This paper introduces Pipe-it, a pipelined framework for CNN inference on ARM big.LITTLE processors that improves throughput by optimizing layer distribution across heterogeneous cores.

## Contribution

It proposes a novel pipelined approach with a performance prediction model to efficiently balance CNN layers across heterogeneous cores, surpassing previous methods.

## Key findings

- Achieves 39% higher throughput on average compared to prior approaches.
- Effectively models execution time using only convolutional layer descriptors.
- Demonstrates improved utilization of heterogeneous core architectures.

## Abstract

IoT Edge intelligence requires Convolutional Neural Network (CNN) inference to take place in the edge devices itself. ARM big.LITTLE architecture is at the heart of prevalent commercial edge devices. It comprises of single-ISA heterogeneous cores grouped into multiple homogeneous clusters that enable power and performance trade-offs. All cores are expected to be simultaneously employed in inference to attain maximal throughput. However, high communication overhead involved in parallelization of computations from convolution kernels across clusters is detrimental to throughput. We present an alternative framework called Pipe-it that employs pipelined design to split convolutional layers across clusters while limiting parallelization of their respective kernels to the assigned cluster. We develop a performance-prediction model that utilizes only the convolutional layer descriptors to predict the execution time of each layer individually on all permitted core configurations (type and count). Pipe-it then exploits the predictions to create a balanced pipeline using an efficient design space exploration algorithm. Pipe-it on average results in a 39% higher throughput than the highest antecedent throughput.

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Source: https://tomesphere.com/paper/1903.05898