A Lightweight McEliece Cryptosystem Co-processor Design

TL;DR

This paper presents a hardware co-processor design for a McEliece cryptosystem variant that uses Orthogonal Latin Square Codes to reduce computational complexity, hardware costs, and key sizes, enhancing quantum-resistant encryption.

Contribution

It introduces a novel hardware implementation of a McEliece cryptosystem variant utilizing Orthogonal Latin Square Codes for improved efficiency and reduced resource requirements.

Findings

Significantly smaller hardware cost compared to traditional designs

Reduced key size and computational complexity

Effective quantum-resistant encryption performance

Abstract

Due to the rapid advances in the development of quantum computers and their susceptibility to errors, there is a renewed interest in error correction algorithms. In particular, error correcting code-based cryptosystems have reemerged as a highly desirable coding technique. This is due to the fact that most classical asymmetric cryptosystems will fail in the quantum computing era. Quantum computers can solve many of the integer factorization and discrete logarithm problems efficiently. However, code-based cryptosystems are still secure against quantum computers, since the decoding of linear codes remains as NP-hard even on these computing systems. One such cryptosystem is the McEliece code-based cryptosystem. The original McEliece code-based cryptosystem uses binary Goppa code, which is known for its good code rate and error correction capability. However, its key generation and decoding procedures have a high computation complexity. In this work we propose a design and hardware implementation of an public-key encryption and decryption co-processor based on a new variant of McEliece system. This co-processor takes the advantage of the non-binary Orthogonal Latin Square Codes to achieve much smaller computation complexity, hardware cost, and the key size.