OpenCL-based FPGA accelerator for disparity map generation with stereoscopic event cameras

TL;DR

This paper develops FPGA accelerators for disparity map generation using stereoscopic event cameras, demonstrating over 8x speedup with simple code modifications, advancing hardware support for event-based vision algorithms.

Contribution

It introduces FPGA-based accelerators for a stereo matching algorithm with event cameras, showcasing flexible design testing and significant performance improvements.

Findings

Achieved over 8x speedup in disparity map generation

Implemented multiple FPGA accelerator designs using OpenCL

Demonstrated ease of testing different accelerator configurations

Abstract

Although event-based cameras are already commercially available. Vision algorithms based on them are still not common. As a consequence, there are few Hardware Accelerators for them. In this work we present some experiments to create FPGA accelerators for a well-known vision algorithm using event-based cameras. We present a stereo matching algorithm to create a stream of disparity events disparity map and implement several accelerators using the Intel FPGA OpenCL tool-chain. The results show that multiple designs can be easily tested and that a performance speedup of more than 8x can be achieved with simple code transformations.