# Clockless Spin-based Look-Up Tables with Wide Read Margin

## TL;DR

This paper introduces a novel clockless spin-based lookup table using SHE-MTJ technology, achieving wider read margins, error-free operation under variations, and significant reductions in power and area compared to traditional SRAM and STT-MTJ LUTs.

## Contribution

It presents a new fracturable 6-input non-volatile C-LUT with differential MTJ design, offering improved read margin, error resilience, and lower power and area consumption.

## Key findings

- No read/write errors under process variations
- 5.4-fold reduction in standby power
- Area reduction of 1.3x over SRAM and 2x over STT-MTJ

## Abstract

In this paper, we develop a 6-input fracturable non-volatile Clockless LUT (C-LUT) using spin Hall effect (SHE)-based Magnetic Tunnel Junctions (MTJs) and provide a detailed comparison between the SHE-MTJ-based C-LUT and Spin Transfer Torque (STT)-MTJ-based C-LUT. The proposed C-LUT offers an attractive alternative for implementing combinational logic as well as sequential logic versus previous spin-based LUT designs in the literature. Foremost, C-LUT eliminates the sense amplifier typically employed by using a differential polarity dual MTJ design, as opposed to a static reference resistance MTJ. This realizes a much wider read margin and the Monte Carlo simulation of the proposed fracturable C-LUT indicates no read and write errors in the presence of a variety of process variations scenarios involving MOS transistors as well as MTJs. Additionally, simulation results indicate that the proposed C-LUT reduces the standby power dissipation by 5.4-fold compared to the SRAM-based LUT. Furthermore, the proposed SHE-MTJ-based C-LUT reduces the area by 1.3-fold and 2-fold compared to the SRAM-based LUT and the STT-MTJ-based C-LUT, respectively.