Silicon quantum processor unit cell operation above one Kelvin

TL;DR

This paper demonstrates a silicon quantum processor unit cell operating coherently at around 1.5 Kelvin, significantly higher than typical millikelvin temperatures, which could simplify cooling requirements for scalable quantum computing.

Contribution

The authors show that a silicon quantum dot qubit system can operate coherently at temperatures above 1 Kelvin, using isolation techniques and electrical control, advancing scalable quantum processor design.

Findings

Achieved single-qubit gate fidelity of 98.6% at 1.5 K

Demonstrated qubit coherence time of 2 microseconds at elevated temperature

Operated the unit cell at magnetic fields as low as 0.1 T

Abstract

Quantum computers are expected to outperform conventional computers for a range of important problems, from molecular simulation to search algorithms, once they can be scaled up to large numbers of quantum bits (qubits), typically millions. For most solid-state qubit technologies, e.g. those using superconducting circuits or semiconductor spins, scaling poses a significant challenge as every additional qubit increases the heat generated, while the cooling power of dilution refrigerators is severely limited at their operating temperature below 100 mK. Here we demonstrate operation of a scalable silicon quantum processor unit cell, comprising two qubits confined to quantum dots (QDs) at $\sim$1.5 Kelvin. We achieve this by isolating the QDs from the electron reservoir, initialising and reading the qubits solely via tunnelling of electrons between the two QDs. We coherently control the qubits using electrically-driven spin resonance (EDSR) in isotopically enriched silicon $^{28}$Si, attaining single-qubit gate fidelities of 98.6% and coherence time $T_2^*$ = 2$\mu$s during `hot' operation, comparable to those of spin qubits in natural silicon at millikelvin temperatures. Furthermore, we show that the unit cell can be operated at magnetic fields as low as 0.1 T, corresponding to a qubit control frequency of 3.5 GHz, where the qubit energy is well below the thermal energy. The unit cell constitutes the core building block of a full-scale silicon quantum computer, and satisfies layout constraints required by error correction architectures. Our work indicates that a spin-based quantum computer could be operated at elevated temperatures in a simple pumped $^4$He system, offering orders of magnitude higher cooling power than dilution refrigerators, potentially enabling classical control electronics to be integrated with the qubit array.

Figures

Equations

$$|(1,1)S⟩$$

$$|(1,1)T_0⟩$$

$$|(1,1)T_{+}⟩$$

$$|(1,1)T_{-}⟩$$

$$|(1,1)S⟩$$

$$|(1,1)T_0⟩$$

$$|(1,1)T_{+}⟩$$

$$|(1,1)T_{-}⟩$$

$$P_{ZZ|\uparrow \downarrow ⟩}=A_{|\uparrow \downarrow ⟩}{e}_1+C,$$

$$P_{ZZ|\downarrow \uparrow ⟩}=A_{|\downarrow \uparrow ⟩}{e}_2+C,$$

$$e_1=\exp (-{\tau }_{\mathrm{wait}}/T_{\text{1Q1}}),$$

$$e_2=\exp (-{\tau }_{\mathrm{wait}}/T_{\text{1Q2}}).$$

$$P_{ZZ|\uparrow \uparrow ⟩}=-2A_{|\uparrow \uparrow ⟩}(e_1-\frac{1}{2})(e_2-\frac{1}{2})+\frac{1}{2}+C.$$

$$\begin{array}{rl}{P}_{ZZ}=& (A_{|\uparrow \uparrow ⟩}+A_{|\uparrow \downarrow ⟩})e_1+(A_{|\uparrow \uparrow ⟩}+A_{|\downarrow \uparrow ⟩})e_2\\ & -2A_{|\uparrow \uparrow ⟩}{e}_1{e}_2+C.\end{array}$$

Full text

Now at ]Research and Prototype Foundry, The University of Sydney, NSW 2006, Australia.

Silicon quantum processor unit cell operation above one Kelvin

C. H. Yang

henry.yang@unsw.edu.au

  

R. C. C. Leon

  

J. C. C. Hwang

[

  

A. Saraiva

  

T. Tanttu

  

W. Huang

Centre for Quantum Computation and Communication Technology, School of Electrical Engineering and Telecommunications, The University of New South Wales, Sydney, NSW 2052, Australia

  

J. Camirand Lemyre

Institut Quantique et Département de Physique, Université de Sherbrooke, Sherbrooke, Québec J1K 2R1, Canada

  

K. W. Chan

Centre for Quantum Computation and Communication Technology, School of Electrical Engineering and Telecommunications, The University of New South Wales, Sydney, NSW 2052, Australia

  

K. Y. Tan

QCD Labs, QTF Centre of Excellence, Department of Applied Physics, Aalto University, 00076 Aalto, Finland

  

F. E. Hudson

Centre for Quantum Computation and Communication Technology, School of Electrical Engineering and Telecommunications, The University of New South Wales, Sydney, NSW 2052, Australia

  

K. M. Itoh

School of Fundamental Science and Technology, Keio University, 3-14-1 Hiyoshi, Kohokuku, Yokohama 223-8522, Japan.

  

A. Morello

Centre for Quantum Computation and Communication Technology, School of Electrical Engineering and Telecommunications, The University of New South Wales, Sydney, NSW 2052, Australia

  

M. Pioro-Ladrière

Institut Quantique et Département de Physique, Université de Sherbrooke, Sherbrooke, Québec J1K 2R1, Canada

Quantum Information Science Program, Canadian Institute for Advanced Research, Toronto, ON, M5G 1Z8, Canada

  

A. Laucht

Centre for Quantum Computation and Communication Technology, School of Electrical Engineering and Telecommunications, The University of New South Wales, Sydney, NSW 2052, Australia

  

A. S. Dzurak

a.dzurak@unsw.edu.au

Centre for Quantum Computation and Communication Technology, School of Electrical Engineering and Telecommunications, The University of New South Wales, Sydney, NSW 2052, Australia

**Quantum computers are expected to outperform conventional computers for a range of important problems, from molecular simulation to search algorithms, once they can be scaled up to large numbers of quantum bits (qubits), typically millions Feynman1982 ; Loss1998 ; Fowler2012 . For most solid-state qubit technologies, e.g. those using superconducting circuits or semiconductor spins, scaling poses a significant challenge as every additional qubit increases the heat generated, while the cooling power of dilution refrigerators is severely limited at their operating temperature below 100 mK Devoret2004 ; Vandersypen2017 ; Almudever2017 . Here we demonstrate operation of a scalable silicon quantum processor unit cell, comprising two qubits confined to quantum dots (QDs) at $\boldsymbol{\sim}$1.5 Kelvin. We achieve this by isolating the QDs from the electron reservoir, initialising and reading the qubits solely via tunnelling of electrons between the two QDs Bertrand2015 ; Veldhorst2017 ; Crippa2018 . We coherently control the qubits using electrically-driven spin resonance (EDSR) Pioro2008 ; Leon2019 in isotopically enriched silicon 28Si itoh_watanabe_2014 , attaining single-qubit gate fidelities of 98.6% and coherence time $\boldsymbol{T_{2}^{*}}$ = 2 $\boldsymbol{\mu}$s during ‘hot’ operation, comparable to those of spin qubits in natural silicon at millikelvin temperatures  Takeda2016 ; Kawakami2016 ; Watson2018 ; Zajac2018 . Furthermore, we show that the unit cell can be operated at magnetic fields as low as 0.1 T, corresponding to a qubit control frequency of 3.5 GHz, where the qubit energy is well below the thermal energy. The unit cell constitutes the core building block of a full-scale silicon quantum computer, and satisfies layout constraints required by error correction architectures Veldhorst2017 ; Jones2018 . Our work indicates that a spin-based quantum computer could be operated at elevated temperatures in a simple pumped 4He system, offering orders of magnitude higher cooling power than dilution refrigerators, potentially enabling classical control electronics to be integrated with the qubit array Hornibrook2015 ; Degenhardt2017 . **

Electrostatically gated QDs in Si/SiGe or Si/SiO2 heterostructures are prime candidates for spin-based quantum computing due to their long coherence times, high control fidelities, and industrial manufacturability Veldhorst2014 ; Kawakami2016 ; Marurand2016 ; Takeda2016 ; Yoneda2018 ; Yang2019 . In large scale quantum processors the qubits will be arranged in either 1D chains Jones2018 or 2D arrays Fowler2012 to enable quantum error correction schemes. For architectures relying on exchange coupling for two-qubit operation Veldhorst2015 ; Watson2018 ; Zajac2018 ; Huang2018 , the QDs are expected to be densely packed. Until now, two-qubit QD systems have been tunnel-coupled to a nearby charge reservoir that has typically been used for initialisation and readout using spin-to-charge conversion Elzerman2004 . Here we demonstrate an isolated double QD system that requires no tunnel-coupled reservoir Bertrand2015 ; Veldhorst2017 ; Crippa2018 to perform full two-qubit initialisation, control and readout – thus realising the elementary unit cell of a scalable quantum processor (see Figure 1h).

Figure 1a shows a scanning electron microscope (SEM) image of a silicon metal-oxide-semiconductor (Si-MOS) double QD device nominally identical to the one measured. The device is designed with a cobalt micromagnet to facilitate EDSR, whereby an AC voltage at frequency $f_{\text{qubit}}$ is applied to the micromagnet electrode to drive spin resonance Pioro2008 , and a single electron transistor (SET) charge sensor is used to detect changes in the electron occupation of the two QDs Leon2019 . The experimental setup is described in 1. In Figure 1b-f we illustrate the tuning sequence that we use to configure the isolated double QD unit cell in the (3,3) charge configuration. We start by accumulating the desired total number of electrons under G1, then deplete the electrons under gate J and G2, and finally cut off the electron reservoir by lowering the bias applied to the barrier gate B. At the end of the tuning sequence, the strong barrier confinement ensures no electrons can tunnel into or out of the qubit cell. The ability to operate the unit cell without any changes in electron occupation throughout initialization, control and readout is the prerequisite for scaling it up to large 2D arrays (see Figure 1h), where qubit control can be achieved by global magnetic resonance or via an array of micromagnets that allow local EDSR. Using the gates G1, J and G2 (see Figure 1g) we can distribute the 6 electrons arbitrarily within the qubit cell, as demonstrated in the stability diagram shown in Figure 1i. In this work, we focus on the (3,3) charge configuration (See 2). Here, the lower two electrons in each dot form a spin-zero closed shell in the lower conduction-band valley state, and we use the spins of the unpaired electrons in the upper valley states of the silicon QDs as our qubits Veldhorst2015b . It is also possible to operate the qubits in the (1,1) and (1,3) charge configurations (see 3), but (3,3) is chosen for better EDSR driving strength and J-gate control Leon2019 .

We depict the entire control, measurement and initialisation cycle in Figure 2a,b. Throughout operation, the same six electrons stay within the unit cell. We measure the two-spin state based on a variation of the Pauli spin blockade. As for traditional singlet-triplet readout Ono2002 , tunnelling of the electrons into the same dot is only allowed for a spin singlet state due to the Pauli exclusion principle. On the other hand, not all triplets are blockaded – the $T_{0}$ triplet mixes with the singlet state at a rate faster than our SET charge readout. Therefore any combination of $\left|\uparrow\downarrow\right\rangle$ and $\left|\downarrow\uparrow\right\rangle$ will be allowed to tunnel. As a result, spin-to-charge conversion in our device manifests itself as spin parity readout, measuring the $\hat{\sigma}_{ZZ}$ projection of the two-qubit system, where $\hat{\sigma}$ is the Pauli operator (see Methods).

In the remainder of the paper, we denote this parity readout output as $P_{ZZ}$, the expectation value of $\hat{P}_{ZZ}=\frac{1}{2}(\hat{\sigma}_{II}-\hat{\sigma}_{ZZ})$. An even spin state readout then leads to $P_{ZZ}=0$ and an odd state leads to $P_{ZZ}=1$.

Initialisation is based on first preparing the unit cell in the (2,4) $S$ state, before moving one electron to Qubit 1 (Q1) to create a (3,3) $S$-like state. For $hf_{\text{qubit}}\gg k_{\text{B}}T$ we can also initialise the system in the well-defined $\left|\downarrow\downarrow\right\rangle$ state by dwelling at a spin relaxation hot-spot Watson2018 ; Huang2018 . In Figure 2c we show Rabi oscillations for the two different initialisation states, starting in either the $S$-like or the $\left|\downarrow\downarrow\right\rangle$ state. Additional verification of the initialised states is performed by spin relaxation measurements described in Methods section and 4.

We confirm that our readout procedure distinguishes the state parity by serially driven Rabi rotations shown in Figure 2d, where we coherently and unconditionally rotate first Q1 and then Q2, and measure the output state. Reading other two-qubit projections is also straightforward. Rotating one of the qubits by $\pi/2$ we gain access to $\hat{P}_{ij}=\frac{1}{2}(\hat{\sigma}_{II}-\hat{\sigma}_{ij})$, where $i,j\in X,Y,Z$. Furthermore, adding a conditional two-qubit gate like a CNOT before readout, we can turn the parity readout into a single qubit readout. Figure 2e shows the pulse sequence from Figure 2d with an added CNOT gate based on performing a conditional-Z (CZ) gate. We achieve the conditional phase shift by pulsing the J gate to temporarily increase the $J$ coupling between the two qubits (without changing the charge detuning). The single qubit readout result is shown in Figure 2f. The sequence reads out only the Q1 spin state as $\hat{P}_{Z1}=\frac{1}{2}(\hat{\sigma}_{II}-\hat{\sigma}_{ZI})$, independent of Q2. To read out Q2, one would simply need to swap target and control of the CNOT gate. The small but visible oscillations along the $y$-axis in the data are due to imperfect CZ pulsing. Details of the CNOT gate data are shown in 5, where the CNOT gate parameters in panel c are the same as those for Figure 2f.

Having demonstrated the general operation of the quantum processor unit cell including initialisation, one- and two-qubit control, and parity and single-qubit readout, we can now investigate the effect of temperature. For large scale quantum computer integration, the benefits of raising the temperature to reduce engineering constraints have to be carefully balanced with the presence of increased noise. Prior studies have examined the relaxation of Si-MOS QD spin qubits at temperatures of 1.1 K Petit2018 and coherence times of ensembles of Si-MOS QDs up to 10 K Shankar2010 . The coherence times of single deep-level impurities in silicon at 10 K Ono2019 and ensembles of donor electron spins in silicon up to 20 K Tyryshkin2003 ; Tyryshkin2012 were also examined. However, coherence times and gate fidelities of these qubits have not been investigated as yet. Here we investigate the gate fidelity of a fully-controllable spin qubit at 1.5 Kelvin.

In Figure 3 we present single-qubit Rabi chevrons and randomised benchmarking for temperatures of $T_{\text{cold}}=40~{}\pm~{}5$ mK in Figure 3a-d, and $T_{\text{hot}}=1.5~{}\pm~{}0.1$ K in Figure 3e-h. Here, $T_{\text{hot}}=1.5$ K is achieved by simply pumping on the 4He in the 1K pot of the dilution refrigerator, while the 3He circulation is completely shut off. Qubit operation and readout at this elevated temperature is possible since our QDs have relatively high valley splitting ($>500$ $\mu$eV) and orbital splitting energies ($>2.5$ meV) Leon2019 . We observe Rabi chevrons, indicating coherent qubit control, for both $B_{0}=1.4$ T and $B_{0}=0.1$ T at $T_{\text{hot}}=1.5$ K, despite the thermal energy being larger than the qubit energy ($k_{\text{B}}T\gg hf_{\text{qubit}}$).

From the decay of the Ramsey oscillations in Figure 3g we determine a coherence time $T_{2}^{*}$ at this elevated temperature of $2.0\pm 0.3$ $\mu$s, comparable to that in natural silicon at mK temperatures Takeda2016 ; Kawakami2016 ; Watson2018 ; Zajac2018 . The single qubit gate fidelity extracted from randomised benchmarking is $F_{\text{SQ}}=98.6\pm 0.1$ %, nearly at the fault tolerant level (see Figure 3h). For reference, the qubit’s performance at $T_{\text{cold}}=40$ mK is shown in Figure 3a-d, at which both $T_{2}^{*}$ and $F_{\text{SQ}}$ are about 6 times better.

We present a more detailed study of the coherence times and relaxation times as a function of mixing chamber temperature $T_{\text{MC}}$ in Figure 4. A similar study as a function of external magnetic field is presented in 8, where we observe the Hahn echo time to scale linearly with $B_{0}$, where shorter relaxation times at lower field are possibly due to spin-orbit Johnson noise struck2019spin . Temperature has the strongest impact on $T_{1}$, which scales as $T^{-5}$ between 0.5 and 1.0 K. This could be interpreted as a Raman process involving intervalley piezophonons stemming from the oxide layer – if the spin-lattice relaxation was dominated by Si deformation potential phonons, the temperature power law should be stronger, as discussed in Ref. Petit2018 . $T_{2}^{\text{Hahn}}$ and $T_{2}^{*}$ display a weaker dependence on temperature.

The results in Figure 4 show a significant reduction in spin relaxation and coherence times going from 100 mK to 1.5 K. While this reduction does not prevent the qubits from being operated at this temperature, future device engineering should aim to minimise possible sources of noise for optimised high-temperature operation. Residual 29Si nuclear spins that couple to the qubits through the hyperfine interaction lead to background magnetic field noise that could be easily reduced by using silicon substrates with higher isotopic enrichment Witzel2010 . Our devices contain $800$ ppm residual 29Si atoms, which is more than one order of magnitude higher than what is currently available Tyryshkin2012 ; itoh_watanabe_2014 . While the gradient magnetic field from a micromagnet, as required for EDSR operation Pioro2008 ; Kawakami2016 ; Leon2019 , might freeze out nuclear spin dynamics Tyryshkin2012 , it will also make the qubits more sensitive to electric field noise induced by the artificial spin-orbit coupling struck2019spin . Charge noise has been shown to increase with temperature Petit2018 , and could constitute the dominant noise source for EDSR systems at elevated temperatures. Furthermore, since the drop in visibility in Figure 3 can be attributed to a lower charge readout fidelity owing to the broadening of the SET peak (see 9), replacing SET current readout with a readout mechanism that offers better signal to noise ratios should improve readout fidelities at higher temperatures. Radio-frequency gate dispersive readout West2019 ; Crippa2018 could act as a solution, while, at the same time, providing a truly scalable unit cell footprint.

In conclusion, we have presented a fully operable two-qubit system in an isolated quantum processor unit cell, which allows operation up to 1.5 K – a temperature that is conveniently achieved using pumped 4He cryostats – where we reach near fault-tolerant single-qubit fidelities. These results pave the way for scaling of silicon-based quantum processors to very large numbers of qubits.

Methods

Feedback controls

Three types of feedback/calibration processes are implemented for the experiments:

• •

SET sensor current feedback – For each current trace acquired by the digitizer, $I_{\text{SET}}$ during the Reset stage is compared against a set value. In case of Figure 2a this set value is 50 pA. The SET top-gate voltage is then adjusted to ensure $I_{\text{SET}}$ stays at $\sim$50 pA.

• •

Charge detuning feedback – The charge detuning level between the two dots is controlled by monitoring the bias at which the charge transition occurs, shown by the red arrow in Figure 2a. Adjusting the bias on $V_{\text{G1}}$, the charge transition is then retuned to occur at 60% of the Read Feedback stage.

• •

Spin qubit resonance calibration – Frequency calibration of the microwave frequencies is applied during the measurement of Figure 3d,h. The calibration protocol is the same as the one detailed in Ref. Huang2018 .

Temperature control

For operation at base temperature $T_{\text{MC}}=40~{}\text{mK}$, the circulation of 3He is fully enabled. For $T_{\text{MC}}>40~{}\text{mK}$ and $T_{\text{MC}}<=1~{}\text{K}$, we turn on the heater at the mixing chamber stage (See 1) with a Proportional Integral (PI) computer controller. For $T_{\text{MC}}=1.5~{}\text{K}$, the 3He circulation is completely stopped by closing the circulation valves, and turning off all heaters. The fridge is then left for at least 1 day for $T_{\text{MC}}$ to saturate at 1.5 K, the temperature of the 1K pot stage. The 1K pot was actively pumped during all the measurements in this work.

To validate the temperature accuracy, we performed effective electron temperature measurements of the isolated QDs by measuring the broadening of the (2,4)-(3,3) charge transition as shown in 6a. Having determined the lever arms from magnetospectroscopy (see 7) we fit the charge transitions to extract the effective electron temperatures (see 6b). For $T_{\text{MC}}>0.4$ K, the extracted temperature matches well with the mixing chamber thermometer of the fridge.

Wait-time-dependent phase Ramsey measurement

To extract $T_{2}^{*}$ times at high temperatures, where the control pulses are of similar duration as the coherence time, the conventional way of setting a resonance frequency detuning would greatly suppress the already low visibility of the oscillations. A more efficient way to extract $T_{2}^{*}$ is to use zero-detuning pulses while applying a large wait-time-dependent phase shift to the second $\pi/2$-pulse. This results in fast Ramsey fringes while maintaining maximum visibility. For example, in Figure 3g, the phase of the second microwave pulse has the dependency $\theta_{\text{MW}}=2\times 10^{6}\times 2\pi\tau_{\text{wait}}$, giving Ramsey fringes with a frequency of 2 MHz.

For all Ramsey measurements, each data point consist of 100 single shots per acquisition, with 5 overall repeats, giving a total of 500 single shots.

Parity readout

In general, the joint state of a pair of spins may be measured through a spin-to-charge conversion based on the Pauli exclusion principle. In a double dot system, interdot tunnelling is stimulated by detuning the energy levels of one quantum dot with respect to the other. If the pair of electrons is in the singlet state, tunnelling will occur and the charge distribution in the double dot will change. A charge measurement then allows us to distinguish a singlet state from any one of the spin triplets.

For simplicity, we will refer to the possible charge configurations as $(1,1)\rightarrow(0,2)$, but any configuration with two effective valence spins is valid, including the (3,3) charge configuration investigated in this work. If Pauli spin blockade occurred in the standard way, we would have the simple mapping

[TABLE]

and the final state after the measurement would be a pure state. A measurement of the charge state would distinguish singlets from triplets, i.e., discern between distinct eigenstates of total angular momentum $\hat{S}_{\rm TOT}^{2}=(\hat{S_{1}}+\hat{S_{2}})^{2}$.

In practice, relaxation between the triplet states and the singlet ground state occurs at the same time as the charge measurement process. Spin flip relaxation is slower than 10 ms for all temperatures studied here, as shown in Figure 4 of the main text, so that the $T_{+}$ and $T_{-}$ states will be preserved for a sufficiently long time for our SET-based measurement to be completed.

On the other hand, the $T_{0}$ triplet and the singlet are constantly mixing with each other, either through the difference in Overhauser fields from nuclear spins (reduced here in isotopically enriched 28Si), difference in g-factors under external applied magnetic field, or due to the micromagnet field gradient.

The wavefunction component of $|(1,1)T_{0}\rangle$ that mixes into the $|(1,1)S\rangle$ state rapidly relaxes into the $|(0,2)S\rangle$ state. This means that at the time scale of the $S-T_{0}$ mixing, the population in $|(1,1)T_{0}\rangle$ is depleted and relaxes into $|(0,2)S\rangle$.

Since this relaxation mechanism is much faster than any spin flip mechanism, after a sufficiently long time (compared to the $S-T_{0}$ mixing rate and the tunnel/charge relaxation rate), the $T_{0}$ state has completely relaxed into the singlet state and the mapping connects again two pure states

[TABLE]

Now, a charge measurement can distinguish between states of parallel spin state or anti-parallel spins, represented by the observable $\hat{P}_{ZZ}=\frac{1}{2}(\hat{\sigma}_{II}-\hat{\sigma}_{ZZ})$. This measurement therefore corresponds to a parity read-out.

.1 Confirming initialisations using spin relaxation

By preparing a $|{\downarrow\downarrow}\rangle$ state we measure the spin relaxation time $T_{1}$ for both qubits by selectively flipping one of them to a spin up state, followed by a wait time, $\tau_{\rm wait}$. 4a-c are fitted using a simple decay equation $A\exp(-\tau_{\rm wait}/T_{1})+C$, when driving a, Q1 to spin up, b, off-resonance drive, and c, Q2 to spin up. The two qubits have $T_{1}$ = 540 ms and 36 ms, respectively.

When we repeat the same measurement with a $S$-like initialisation, we observe a mixed decay pattern. We now need to fit to a more complicated equation that measures the parity of the spins while both spins are relaxing, assuming no knowledge of the initial state.

For $|{\uparrow\downarrow}\rangle$ and $|{\downarrow\uparrow}\rangle$ components, the relaxation equations for parity readout are:

[TABLE]

where

[TABLE]

For a $|{\uparrow\uparrow}\rangle$ component, assuming no two-spin interactions, it is then:

[TABLE]

Combining the three equations above, for an arbitrary initial state fitting we obtain:

[TABLE]

Equation 14 is then applied to fit 4d-f, which then gives the probability of each eigenstate for $S$-like initialisation, proving indeed it is an equal mixture of $|{\uparrow\downarrow}\rangle$ and $|{\downarrow\uparrow}\rangle$ states.

Acknowledgements

We acknowledge support from the US Army Research Office (W911NF-17-1-0198), the Australian Research Council (CE170100012), Silicon Quantum Computing Proprietary Limited, and the NSW Node of the Australian National Fabrication Facility. The views and conclusions contained in this document are those of the authors and should not be interpreted as representing the official policies, either expressed or implied, of the Army Research Office or the U.S. Government. The U.S. Government is authorised to reproduce and distribute reprints for Government purposes notwithstanding any copyright notation herein. K. M. I. acknowledges support from Grant-in-Aid for Scientific Research by MEXT. J. C. L. and M. P.-L. acknowledge support from the Canada First Research Excellence Fund and in part by the National Science Engineering Research Council of Canada. K. Y. T. acknowledges support from the Academy of Finland through project Nos. 308161, 314302 and 316551.

Author contributions

C.H.Y designed and performed the experiments. C.H.Y., R.C.C.L. and A.S analysed the data. J.C.C.H. and F.E.H. fabricated the device with A.S.D’s supervision. J.C.C.H., T.T. and W.H contributed to the preparation of experiments. J.C.L., R.C.C.L., J.C.C.H., C.H.Y. and M.P.-L. designed the device. K.W.C., K.Y.T. contributed to discussions on the nanofabrication process. K.M.I. prepared and supplied the 28Si epilayer. T.T., W.H., A.M. and A.L. contributed to results discussion and interpretation. C.H.Y., A.S., A.L. and A.S.D. wrote the manuscript with input from all co-authors.