Pseudo-2D superconducting quantum computing circuit for the surface code: the proposal and preliminary tests
H. Mukai, K. Sakata, S.J. Devitt, R. Wang, Y. Zhou, Y. Nakajima and, J.S. Tsai
TL;DR
This paper proposes a novel pseudo-2D superconducting quantum circuit architecture that eliminates the need for complex 3D wiring, enabling scalable, planar quantum computing with high fidelity and minimal cross-talk.
Contribution
Introduction of a pseudo-2D resonator network with airbridges for inter-qubit connections, simplifying wiring and enhancing scalability in superconducting quantum computers.
Findings
Airbridge resonators have sufficient quality factor for high fidelity gates.
The design reduces cross-talk and decoherence in large-scale chips.
The architecture enables monolithic integration without additional packaging complexity.
Abstract
Of the many potential hardware platforms, superconducting quantum circuits have become the leading contender for constructing a scalable quantum computing system. All current architecture designs necessitate a 2D arrangement of superconducting qubits with nearest neighbour interactions, compatible with powerful quantum error correction using the surface code. A major hurdle for scalability in superconducting systems is the so called wiring problem, where qubits internal to a chip-set become inaccessible for external control/readout lines. Current approaches resort to intricate and exotic 3D wiring and packaging technology which is a significant engineering challenge to realize, while maintaining qubit fidelity. Here we solve this problem and present a modified superconducting scalable micro-architecture that does not require any 3D external line technology and reverts back to a…
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Pseudo-2D superconducting quantum computing circuit for the surface code:
the proposal and preliminary tests
H. Mukai
Department of Physics, Tokyo University of Science, 1–3 Kagurazaka, Shinjuku, Tokyo 162–0825, Japan
RIKEN Center for Emergent Matter Science (CEMS), 2–1 Hirosawa, Wako, Saitama 351–0198, Japan
K. Sakata
Department of Physics, Tokyo University of Science, 1–3 Kagurazaka, Shinjuku, Tokyo 162–0825, Japan
RIKEN Center for Emergent Matter Science (CEMS), 2–1 Hirosawa, Wako, Saitama 351–0198, Japan
S. J. Devitt
RIKEN Center for Emergent Matter Science (CEMS), 2–1 Hirosawa, Wako, Saitama 351–0198, Japan
Centre for Quantum Software & Information (QSI), Faculty of Engineering & Information Technology, University of Technology Sydney, Sydney, NSW, 2007, Australia
R. Wang
Department of Physics, Tokyo University of Science, 1–3 Kagurazaka, Shinjuku, Tokyo 162–0825, Japan
Centre for Quantum Software & Information (QSI), Faculty of Engineering & Information Technology, University of Technology Sydney, Sydney, NSW, 2007, Australia
Y. Zhou
RIKEN Center for Emergent Matter Science (CEMS), 2–1 Hirosawa, Wako, Saitama 351–0198, Japan
Y. Nakajima
Department of Physics, Tokyo University of Science, 1–3 Kagurazaka, Shinjuku, Tokyo 162–0825, Japan
Centre for Quantum Software & Information (QSI), Faculty of Engineering & Information Technology, University of Technology Sydney, Sydney, NSW, 2007, Australia
J. S. Tsai
Department of Physics, Tokyo University of Science, 1–3 Kagurazaka, Shinjuku, Tokyo 162–0825, Japan
RIKEN Center for Emergent Matter Science (CEMS), 2–1 Hirosawa, Wako, Saitama 351–0198, Japan
**Of the many potential hardware platforms, superconducting quantum circuits have become the leading contender for constructing a scalable quantum computing system. All current architecture designs necessitate a 2D arrangement of superconducting qubits with nearest neighbour interactions, compatible with powerful quantum error correction using the surface code. A major hurdle for scalability in superconducting systems is the so called wiring problem, where qubits internal to a chip-set become inaccessible for external control/readout lines. Current approaches resort to intricate and exotic 3D wiring and packaging technology which is a significant engineering challenge to realize, while maintaining qubit fidelity. Here we solve this problem and present a modified superconducting micro-architecture that does not require any 3D external line technology and reverts back to a completely planar design. This is enabled by a new pseudo-2D resonator network that provides inter-qubit connections via airbridges. We carried out experiments to examine the feasibility of the newly introduced airbridge component. Our simulation shows the measured quality factor of the airbridge-resonator are below the threshold for surface code and it does not limit gate fidelity. The measured crosstalk between crossed resonators is at most on resonant. The spatial separation between the external wirings and the inter-qubit connections would result with a relatively limited crosstalk between them that would not increase as the size of the chip-set increases. This architecture indicates the possibility that a large-scale, fully error corrected quantum computer could be constructed by monolithic integration technologies without additional overhead and without special packaging know-hows. **
Recently, architecture designs for large-scale quantum computers are becoming more and more comprehensive. This field frequently includes a large amount of quantum engineering specifying how qubits will be manufactured, controlled, characterized and packaged in a modular manner for fault-tolerant, error corrected quantum computation Jones et al. (2012); Nemoto et al. (2014); Gimeno-Segovia et al. (2015); Hill et al. (2015); Lekitsch et al. (2017). The vast majority of architectures base their designs on the surface code because it has one of the highest fault-tolerant thresholds of any error correction code, easing the physical fidelity requirements on the hardware.
Superconducting quantum circuits have emerged as a major contender for a scalable hardware model for the surface code. Superconducting qubits are fabricated with inter-qubit wirings for nearest neighbor interactions and each individual qubit requires external physical access such as bias lines, control lines, and measurement devices. However, as the 2D array is scaled up, planar accessibility for control lines become a problem. Such challenges are sometime referred to as the wiring problem, where physical qubits in the interior are no longer accessible, in plane, from the edge Gambetta et al. (2017).
Compared with classical silicon integrated circuits, it is much more difficult to achieve such wiring in superconducting quantum circuits. To individually access every qubit in the 2D qubit array, standard multi-layer wiring technologies for silicon integrated circuits simply cannot be embraced as it generally requires the introduction of decoherence enhancing, low quality inter-layer insulators. Therefore, in current superconducting systems, many groups are forced to utilize non-monolithic bulky 3D wiring technologies (see Fig. 1), such as flip-chip bonding, pogo pin and through silicon via (TSV) Barends et al. (2014); Takita et al. (2017); Reagor et al. (2018); Chou et al. (2018); Bejanin et al. (2016); Vahidpour et al. (2017); Foxen et al. (2018); Rosenberg et al. (2017).
Our new architecture for the surface code is obtained by transforming the 2D qubit array to a bi-linear array. Fig. 1 shows the mapping between before and after the transformation. The square lattice Fig. 1(a) is divided into many columns. Next, the connections between columns are stretched [Fig. 1(b)], and then, the columns are folded on top of each other successively, as shown in Fig. 1(c). As the connections are stretched out, frequencies of resonators are maintained. Therefore, both circuits before and after transformation occupy approximately the same area, as shown in the yellow colored areas in Fig. 1(a) and (c).
The resulted equivalent surface code circuit is a bi-linear array of the original 2D structure.
The folding operations liberate the columns locked deeply inside the original 2D lattice and brings them out to the edges of the bi-linear array. Therefore the external control/readout lines connected to each qubit are accessible from the edges of the chip. This novel arrangement allows all these external connection to be prepared in a completely standard 2D layout.
The advantage gained in the external wiring by the transformation, however, takes a small toll in the inter-qubit wiring between columns. These inter-qubit connections between neighboring columns require multi-level crossings. Nonetheless, these 3D structures only need to locally hop over inter-qubit connection lines. Thus, the cross-connections between the columns can be described as pseudo-2D.
In comparison, for the original surface code architecture, the multi-layer wiring grid involves an inter-qubit connection layer and an input/output wiring layer. Therefore, a global multi-layer structure, as shown in Fig. 1(a), is often adopted, utilizing non-monolithic bulky 3D wiring technologies as mentioned earlier. Compared to the standard surface code arrangement, the new architecture has the following obvious advantages:
- (1)
The complete separation of the input/output wirings and inter-qubit wirings would probably help to suppress crosstalk between external lines and qubits as well as that between external lines and inter-qubit connection lines. Therefore, it is possible that undesired decoherence of qubits due to external wiring would also be reduced. 2. (2)
2D planar layout of the input/output wirings. These wirings, connecting qubits to external electronics and can be constructed by utilizing the standard 2D wide-band (microwave) wiring technology. Superconducting resonators for the readout of the qubit can also be prepared with the standard 2D coplanar design. 3. (3)
Local 3D (psuedo 2D) wiring. The ends of the inter-qubit connection lines always end up on the same qubit layer, no matter how many 3D hops are involved in the connection. In such case, the multi-layer crossing for the new architecture could be realized simply by local monolithic 3D structures, such as superconducting airbridges.
Moreover, the original square lattice architecture could adopt the local 3D structure (airbriges) for the wire crossings between input/output and inter-qubit connections. However, compared with the new architecture, such arrangement would produce strong crosstalk between external wirings and inter-qubit connection lines (cf. point (1) above).
Consequently, this architecture straightforwardly solves the demanding 3D external wiring problem. As already mentioned, a convenient technology to realize the cross wiring is an airbridge; a monolithic microstructure, developed as a low-loss wiring for superconducting qubits that can be fabricated in several ways, including a well-established standard fabrication process Chen et al. (2014); Dunsworth et al. (2018). A large number of airbridges, compared with the number additionally required for this proposal, are always needed to maintain the uniform ground potential for all coplanar waveguide-based architectures.
To scale up the degree of integration, one needs to consider that increasing the number of qubits in a column, which is represented as green, blue and red columns in a scaled-up structure of our proposed architecture [Fig. 2(a)], would result with the growth of the required number of airbridges. Therefore, one should limit to a minimally required number for a surface code based computer in effective 2D array. This is the arrangement before the transformation shown in Fig. 2(d)]. This limitation posed by the number of airbridges results in a subtle change in the design, compared with the standard 2D array for a surface code architecture.
Typical logical structure of the computer shown in Fig. 2(b) is a 2D array of qubits used for surface code computing, utilizing braid based logic Fowler et al. (2012a). Logical information is introduced by strategically switching on/off parts of the array to create and manipulate defects, which encode the logical qubits within the computer. The larger the 2D array at the physical layer, the more defects can be introduced for number of logically encoded qubits in the computer or the larger each defect can be for the strength of the error correction. Logic operations are then performed by topological braiding of the defects around each other. In Fig. 2(b), we illustrate a lattice that encodes two logical qubits via four pairs of defects introduced into the lattice (shaded regions), where two pairs are for each logical qubit. The defects are encoded using a surface code, which can correct for an arbitrary single qubit error on either of the two encoded defect based qubits. In order to realize this defect-based structure, without significantly compromising the ability to efficiently enact arbitrary error-corrected circuits, the arbitrarily scaling up is required in 2-dimensions.
In our new design, however, the length of columns in the effective 2D array is limited - due to the number of airbridged crossings in a inter-qubit connection - but an arbitrary number of columns is allowed. Therefore, we envisage that lattice surgery encoded logic will be used instead of braid based logic (shown in Fig. 2(c) for the surface code) Horsman et al. (2012). The lattice surgery encoded logic also can aid the realization of sufficiently fast classical error correction decoding Devitt et al. (2010); Fowler et al. (2012b). In lattice surgery, isolated square patches of the planar code (single logical qubit, which is a surface code analogue that can encode a single piece of logical information) are interacted along a boundary to enact multi-qubit logic gates. This reduces the overall physical resource cost of each logical qubit and several results now suggest that lattice surgery techniques will always be more resource efficient when implementing large-scale algorithms Herr et al. (2017); Litinski and Oppen (2018); Fowler and Gidney (2018).
For a single logical qubit encoded with the planar code, a square 2D array of physical qubits is needed. For a quantum code with a distance , a array of physical qubits is sufficient, the number of which can be reduced further utilizing rotated planar lattices Horsman et al. (2012); Litinski and Oppen (2018) (see methods section). This results in a Linear Nearest Neighbour (LNN) logical layout of encoded qubits [shown in Fig 2(d)], requiring less physical resources than defect-based logical qubits. In Fig. 2(d), you can see that there is additional columns of physical qubits only (red colors) that are spacers between each encoded qubit that is required to perform the lattice surgery operations.
It should be noted that the current methods for circuit compilation using lattice surgery still assumes a 2D nearest neighbor arrangement of logically encoded qubits Herr et al. (2017); Fowler and Gidney (2018); Litinski and Oppen (2018). This is because lattice surgery has two basis classes of operations (merges and splits) over two types of boundaries for each planar code qubit (what are known as rough and smooth). As merge and split operations can only occur on the single boundary between logical qubit regions, we need to be able to convert between smooth and rough boundaries (which was detailed in Ref. Horsman et al. (2012)) and hence compilation into this LNN logical structure using pseudo-2D physical qubits layout will require some slight modifications over current techniques Herr et al. (2017); Litinski and Oppen (2018). However, recent results which introduce a single additional row of physical qubits to act as a data bus for logic operations can be used and is completely compatible with a LNN arrangement of qubits at the logical level Herr et al. (2019).
For a large error-correcting code, distance can be of the order of (capable of correcting up to 7-10 errors per logical qubit). With a distance code requiring an array containing rows of qubits with columns, per single logically encoded qubit. Consequently, for a quantum computer containing logical qubits on the planar code, we would utilize an array of . Here, first is the number of qubits in a column, and is the number of columns in the array for logical qubits and the extra factor of is the spacing region between each logical qubit needed for the lattice surgery (or a bus system Herr et al. (2019)). This would translate into a bi-linear array, as shown in Fig. 2(a) of . A number of crossing points by inter-connections are at most half the number of qubits in a column, at most , representing the number of airbridges per resonator. The factor of comes about due to the fact that alternate resonators (inter-connections) are shared by two qubits. Hence, while the number of columns linearly increases with the number of logical qubits, the number of airbridges contained in resonator will only be half number of qubits in a column (which is fixed for a given code distance, ).
In practice, the width of this array is related to the number of logical qubits while its length is given by the distance of the planar code used to encode each logical qubit. For a heavily error corrected logical qubit, , the total number of qubits in a column will be with a maximum number of airbridges for a given resonator of {\color[rgb]{0,0,0}14}\text{--}20. By utilizing planar code encoding and lattice surgery Horsman et al. (2012) for fault-tolerant logic, we can define our computer as a long, rectangular structure consisting of a LNN array of logical qubits (requiring compilation of the high level quantum algorithm with LNN constraints Paler et al. (2017); Herr et al. (2017, 2019)).
To make a feasibility study of this new circuit scheme, we carried out preliminary evaluations of its most important new-
ly introduced component, namely, the pseudo-2D inter-connection consists of crossed resonators with airbridges. We studied the dependence of the gate fidelity on the quality factor of resonators, of which the center line contains airbridges. We also studied the crosstalk between crossed coplanar resonators in the pseudo-2D inter-connection network.
Examining if airbridges can be used while still satisfying the error requirements for surface code quantum error correction, we carried out both experimental and numerical tests on a system containing a lossy resonator for connecting two qubits. Usual research in superconducting quantum circuit employ a very lossless resonator to eliminate its contribution. However there is little research related the dependence on the resonator quality factor. Therefore, the numerical test reveals a lower limit of the internal quality factor, and the experimental test illustrates the possibility that this proposed architecture is expected to be viable using current technology, without special 3D techniques.
We prepared chips using a standard fabrication method for the airbridges, each of which contain both a resonator with airbridges and a reference resonator made out of thick Nb film. Airbridge design of chips including the interval of airbridge position is identical. Any difference in fabrication is only related to the number of airbridge (15 and 20). Each wafer were treated under the same conditions, but they were not fabricated at the same time. Fig. 3(a) shows the measured internal quality factor of resonators containing 15 (black symbol) and 20 (red symbol) airbridges in the center conducting lines [Fig. 3(b)], with reference resonators also illustrated in Fig. 6 (see method section). The quality factor of the resonator with airbridges at the center line, are at the power of the single photon level. In comparison with the reference coplanar resonators, which does not have airbridges, the quality factor decreased by about one order of magnitude. The quality factor of resonator with 20 airbridges is higher than one with 15 airbridges. The result of this reversal between 15 and 20 may be due to deviations that occur in the fabrication process.
To appraise the effect of extra loss resulting from the insertion of airbridges, we simulated an average gate infidelity of a CZ gate in our system, where two transmon-type qubits are coupled through a damped (lossy) resonator. Here each qubit has three energy levels, anharmonicity , the resonator has five energy levels with photon leakage rate (), and the coupling constant between each qubit and resonator . In the system, we ignored the qubit-qubit direct coupling. In the system, we ignored the qubit-qubit direct coupling. We adjusted the state of the system to the condition for CZ gate which is that the energy difference from ground to first excited levels on one qubit is the same as the energy difference from first to second excited levels on the other qubit. Then, we calculated the time evolution of this system, and finally got the average gate fidelity .
In this simulation, at the beginning, the system was set to the CZ gate condition, this means that simulation started after rising of gate pulse. In other words, we simplified simulation by ignoring effects of practical pulse shape. The leakage from the total system to external environment are also assumed that the resonator is responsible. These assumptions are made to evaluate the dependency of fidelity on quality factor of resonators.
Fig. 4 is the result of the simulation, showing the infidelity dependence on the quality factor of the resonator . The result indicates that the required for the infidelity threshold of the surface code (0.75\text{,}\mathrm{\char 37\relax}$$) is , and the infidelity is saturated at .
The experimental internal quality factor of a resonator with airbridges at centerline one order of magnitude greater than what is required by our simulations. In this experiment, current existing technologies were used. Therefore, this results strongly suggests that our proposed system, with real parameters, is feasible.
The crosstalk between two crossed resonator lines is also evaluated using another chip shown in Fig. 5(a). A feed line crosses a resonator, vertically, using an airbridge [Fig. 5(b)]. The frequency of resonator was measured by port 3. We subsequently measured the crosstalk between the feed line and the resonator around the resonant frequency . The crosstalk is due to the airbridge structure which connect center signal line of the resonator across the feed line. A reference continuous microwave signal was applied through the feed line from input port 1 to output port 2 in Fig. 5(a). Then, the signal was absorbed at resonant frequency of the airbridge resonator and it resulted as a small dip. In Fig. 5(c), the normalized, measured data with dip is shown (blue colored circle-markers), and the crosstalk defined by is also shown (red colored cross-markers). The result shows the crosstalk due to the crossing airbridge was at most when frequencies are on resonant.
Therefore, to make the pseudo-2D interconnection network by airbridges, we should assign all the crossed resonators in the network with different frequencies, detuned more than the measured crosstalk bandwidth of . This would suppress the effective crosstalk to an extremely small value, even much smaller than the characteristic background damping in a typical microwave measurement system.
To conclude, we proposed a novel scalable architecture of a superconducting quantum circuit for the surface codes, where the standard planar 2D wirings can be adopted for external wirings, with the help of an airbridge-incorporated inter-qubit pseudo-2D resonator network. We also carried out the feasibility experimental study of the pseudo-2D resonator network, and showed that there is no fundamental difficulties in realizing it. Our result seems to indicate that it may be possible to build a fault-tolerant, large-scale quantum computer by simple monolithic integration technologies. We are planning to construct a small scale circuit to further examine and explore the possibility.
Acknowledgements.
We thank F. Nori, O. V. Astafiev, A. Tomonaga and D. Zhang for discussions. We also thank M. Hidaka to provide wafers with Nb film. This work was supported by CREST, JST. (Grant No. JPMJCR1676), the New Energy and Industrial Technology Development Organization (NEDO), and ImPACT Program of Council for Science, Technology and Innovation (Cabinet Office, Government of Japan).
Author contributions
H.M., K.S., S.J.D. and J.S.T. designed the architecture. H.M., R.W. and Y.N. designed the samples, R.W. and Y.N. fabricated the samples. H.M. and Y.Z. carried out the experiments and analysed the data. K.S. carried out the numerical calculations. H.M., K.S., S.J.D. and J.S.T. wrote the paper with feedback from all authors. J.S.T. designed and supervised the project.
Additional information
Competing interests: The authors declare that there are no competing interests.
Corresponding author: Correspondence and requests for materials should be addressed to J.S.T.
I Methods
Extra information on the experiment: We utilized vector network analyzer (VNA) to measure the internal quality factor and crosstalk. To evaluate the internal quality factor of resonators, we prepare a chip shown in Fig. 6 with 15 airbridges. The spectrum of resonators are measured, using the input and output ports of the feed line coupled to each resonators.
Information on the simulation: We modeled a part of our system as two qubits coupled via a damped resonator, so the Hamiltonian is
[TABLE]
and this indirect-interaction of qubits (last term) is used for the CZ gate. The quantum map can be derived solving the Lindblad master equation, and then we calculate the average gate (in)fidelity in computational subspace between the map and an ideal CZ gate map , which is defined as Wood and Gambetta (2018),
[TABLE]
averaged over the Haar measure . This simulation is performed using Quantum Toolbox in Python (QuTiP) Johansson et al. (2013).
Using the rotated lattice for logical qubit encoding:
In the main text we described the architectural layout using encoded qubits formed from a square lattice of physical qubits. This can be reduced by utilizing the rotated lattice encoding introduced in Ref. Horsman et al. (2012). A rotated lattice will reduce the number of physical qubits in a logical block from to , which for large values of , can result in significant resource savings.
In terms of the hardware architecture itself, there is no changes that is needed for the underlying hardware. In Fig. 7 we illustrate how two encoded qubits in the rotated lattice are translated to the bi-linear design. Unlike the case when encoded qubits are square patches, the airbridge connections become non uniform. However, the maximum number of airbridges within a single resonator does not change between the case of square encoding and rotated encoding. Consequently, the design in the main text is completely compatible with using rotated lattice encoding.
Data availability: The data that support the findings of this study are available from the authors on reasonable request, see author contributions for specific data sets.
Code availability: The numerical data sets presented in Fig. 3 and Fig. 5 of this paper are analyzed by MATLAB by H.M., and the numerical data presented in Fig. 4 of this paper is simulated by H.M. and K.S. The code used to generate this data will be made available to the upon reasonable request.
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