# Designing multi-level resistance states for multi-bit storage using half doped manganites

## TL;DR

This paper demonstrates the design of multi-level resistance states in a half-doped manganite to enable multi-bit nonvolatile memory, utilizing electronic phase coexistence and metastable states stabilized against thermal cycling.

## Contribution

It introduces a method to create and control multiple metastable resistance states in SCSMO manganite for multi-bit storage applications, supported by experimental and theoretical analysis.

## Key findings

- Multiple metastable resistance states stabilized up to 62 K.
- Monte Carlo simulations reveal phase coexistence due to chemical disorder.
- A prototype multi-bit memory device pathway is outlined.

## Abstract

Designing nonvolatile multi-level resistive devices is the necessity of time to go beyond traditional one-bit storage systems, thus enhancing the storage density. Here, we explore the electronic phase competition scenario to design multi-level resistance states using a half doped CE-type charge ordered insulating bulk manganite, $Sm_{0.5}Ca_{0.25}Sr_{0.25}MnO_3$ (SCSMO). By introducing electronic phase coexistence in a controllable manner in SCSMO, we show that the system can be stabilized into several metastable states, against thermal cycling, up to 62 K. As a result the magnetization (and the resistivity) remains unaltered during the thermal cycling. Monte Carlo calculations using two-band double exchange model, including super-exchange, electron-phonon coupling, and quenched disorder, show that the system freezes into a phase coexistence metastable state during the thermal cycling due to the chemical disorder in SCSMO. Using the obtained insights we outline a pathway by utilizing four reversible metastable resistance states to design a prototype multi-bit memory device.