# DSA-aware multiple patterning for the manufacturing of vias: Connections to graph coloring problems, IP formulations, and numerical experiments

## TL;DR

This paper presents a novel approach to manufacturing vias in integrated circuits using DSA-aware multiple patterning, formulating it as a graph coloring problem, with new integer programming models and promising computational results.

## Contribution

It introduces new integer programming formulations for DSA-aware via manufacturing, connecting graph coloring to industrial production, and evaluates their computational performance on real data.

## Key findings

- Best formulation shows good computational performance
- Potential for further speed-up in exact approaches
- Feasible solutions for industrial instances

## Abstract

In this paper, we investigate the manufacturing of vias in integrated circuits with a new technology combining lithography and Directed Self Assembly (DSA). Optimizing the production time and costs in this new process entails minimizing the number of lithography steps, which constitutes a generalization of graph coloring. We develop integer programming formulations for several variants of interest in the industry, and then study the computational performance of our formulations on true industrial instances. We show that the best integer programming formulation achieves good computational performance, and indicate potential directions to further speed-up computational time and develop exact approaches feasible for production.