Binary Message Passing Decoding of Product-like Codes
Alireza Sheikh, Alexandre Graell i Amat, Gianluigi Liva

TL;DR
This paper introduces a binary message passing decoding algorithm called iBDD-SR for product-like codes, which leverages channel reliabilities to improve decoding performance while maintaining low data flow, achieving significant gains over traditional methods.
Contribution
The paper presents a novel soft-in, hard-out decoding algorithm that combines channel reliabilities with bounded distance decoding, reducing data flow and improving performance for product-like codes.
Findings
Achieves up to 0.31 dB performance gain over conventional iBDD.
Density evolution analysis determines optimal scaling factors.
Approaches the performance of ideal iBDD that prevents miscorrections.
Abstract
We propose a novel binary message passing decoding algorithm for product-like codes based on bounded distance decoding (BDD) of the component codes. The algorithm, dubbed iterative BDD with scaled reliability (iBDD-SR), exploits the channel reliabilities and is therefore soft in nature. However, the messages exchanged by the component decoders are binary (hard) messages, which significantly reduces the decoder data flow. The exchanged binary messages are obtained by combining the channel reliability with the BDD decoder output reliabilities, properly conveyed by a scaling factor applied to the BDD decisions. We perform a density evolution analysis for generalized low-density parity-check (GLDPC) code ensembles and spatially coupled GLDPC code ensembles, from which the scaling factors of the iBDD-SR for product and staircase codes, respectively, can be obtained. For the white additive…
| decoding algorithm | channel reliabilities | exchanged messages | [dB] | gain over iBDD [dB] | capacity [dB] | gap from capacity [dB] |
| iBDD | no | hard | () | - | () (HD) | () |
| AD [22] | no | hard | () | () (HD) | ||
| iBDD-SR | yes | hard | () | () | () (SD) | () |
| ideal iBDD | no | hard | () | () | () (HD) | () |
| decoding algorithm | channel reliabilities | exchanged messages | [dB] | gain over iBDD [dB] | capacity [dB] | gap from capacity [dB] |
| iBDD | no | hard | () | - | () (HD) | () |
| AD [22] | no | hard | () | () (HD) | ||
| iBDD-SR | yes | hard | () | () | () (SD) | () |
| ideal iBDD | no | hard | () | () | () (HD) | () |
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Binary Message Passing Decoding
of Product-like Codes
Alireza Sheikh , Alexandre Graell i Amat, ,
and Gianluigi Liva This paper was presented in part at the European Conference on Optical Communications (ECOC), Rome, Italy, 2018, and the International Symposium on Turbo codes Iterative Information Processing, Hong Kong, 2018.This work was funded by the Knut and Alice Wallenberg Foundation.A. Sheikh and A. Graell i Amat are with the Department of Electrical Engineering, Chalmers University of Technology, SE-41296 Gothenburg, Sweden (email: asheikh, [email protected]).G. Liva is with the Institute of Communications and Navigation of the German Aerospace Center (DLR), Münchner Strasse 20, 82234 Weßling, Germany (email: [email protected]).
Abstract
We propose a novel binary message passing decoding algorithm for product-like codes based on bounded distance decoding (BDD) of the component codes. The algorithm, dubbed iterative BDD with scaled reliability (iBDD-SR), exploits the channel reliabilities and is therefore soft in nature. However, the messages exchanged by the component decoders are binary (hard) messages, which significantly reduces the decoder data flow. The exchanged binary messages are obtained by combining the channel reliability with the BDD decoder output reliabilities, properly conveyed by a scaling factor applied to the BDD decisions. We perform a density evolution analysis for generalized low-density parity-check (GLDPC) code ensembles and spatially coupled GLDPC code ensembles, from which the scaling factors of the iBDD-SR for product and staircase codes, respectively, can be obtained. For the white additive Gaussian noise channel, we show performance gains up to dB and dB for product and staircase codes compared to conventional iterative BDD (iBDD) with the same decoder data flow. Furthermore, we show that iBDD-SR approaches the performance of ideal iBDD that prevents miscorrections.
Index Terms:
Binary message passing, bounded distance decoding, complexity, hard decision decoding, product codes, staircase codes.
I Introduction
A renewed interest in the design of iterative coding schemes has been recently triggered by the need of efficient error correction mechanisms for very high throughput applications. Turbo and low-density parity-check (LDPC) codes have been shown to be capable of approaching the channel capacity under belief propagation (BP) decoding [1, 2]. However, applications requiring transmission at data rates of several hundreds of Gbps (such as optical transport systems [3]) pose a challenge to the implementation of fast BP decoders. The difficulty is especially due to the handling of the internal decoder data flow when soft messages are exchanged within the iterative decoder. In this context, attempts to reduce to complexity of soft-input soft-output (SISO) LDPC decoders have been undertaken, e.g., in [4, 5, 6, 7]. An alternative line of research is to resort to hard decision decoding (HDD) for such applications. HDD reduces the decoder data flow [8] at the expense of some performance loss compared to (BP) soft decision decoding (SDD) [9].
Among the coding schemes that are particularly suited for high throughput HDD, product codes (PCs) [10] gained a large attention. The iterative decoding of PCs dates back to 1968 [11], and it regained attention after employing SDD based on the Chase-Pyndiah decoding algorithm, which improved the coding gain extensively [12]. Several works tackled the complexity reduction of the Chase-Pyndiah decoder [13, 14, 15, 16, 17]. However, these approaches still require the exchange of soft messages between component decoders, which prevents from achieving very high throughputs. Recently, HDD of product-like codes with bounded distance decoding (BDD) of the component codes, which we refer here to iterative BDD (iBDD), has been considered for high-throughput optical communications due to their excellent performance-complexity tradeoff, see, e.g., [18, 19, 20]. For instance, PCs have been adopted by the optical submarine standard [21].
To keep up with the increasing demand of coding gains, performance improvements of the coding scheme coupled with a reasonable decoding complexity are necessary. In [22], an algorithm that exploits conflicts between component decoders in order to assess their reliabilities even when no channel reliability information is available, was proposed. The algorithm, named anchor decoding (AD), improves the performance of iBDD at the expense of some increase in decoding complexity. However, the performance is still limited by the binary (i.e., hard) nature of the decoder input. The use of HDD is typically motivated by the need of operating with low-complexity analog to digital converters (ADCs) and the above mentioned limitations in the internal decoder data flow. Whereas the latter motivation is hard to circumvent, the former motivation is often irrelevant for several practical applications. In this case, the use of soft information at the decoder input may be considered if the complexity of the decoding algorithms is kept close to that of HDD. Following this paradigm, one proposal is to concatenate an inner code for which SDD can be performed with limited complexity, with an outer HDD code [23, 24].
In this paper, we propose a low-complexity binary message passing decoding algorithm for product-like codes that relies on BDD of the component codes. The proposed algorithm exploits the channel reliabilities and thus is soft in nature. However, the component decoders exchange only hard decisions (i.e., binary messages), which yields a decoder data flow equal to that of conventional iBDD. The binary messages are obtained by combining the BDD outputs with the channel soft information similar to the approach proposed in [25] for the decoding of LDPC codes. The algorithm, which we dub iterative bounded distance decoding with scaled reliability (iBDD-SR), relies on the weighted sum of the BDD output with the channel log-likelihood ratio (LLR), where the BDD decoder output reliability is conveyed by a scaling factor applied to the BDD outbound messages.
This work is the extension of the conference paper [26], where we originally proposed iBDD-SR for PCs, and where the scaling factors were derived based on simulation results. This prevented the extension of iBDD-SR to other product-like codes, as the search of the scaling factors based on simulations for product-like codes such as staircase codes proved infeasible. Here, we derive a density evolution under iBDD-SR for generalized LDPC (GLDPC) code ensembles and spatially coupled GLDPC (SC-GLDPC) code ensembles, based on extrinsic BDD of the component codes, that allows us to derive the scaling factors. The derived density evolution analysis rigorously takes care of miscorrections, and follows the same principles as the density evolution proposed in [27] for the iBDD case. In particular, the density evolution for GLDPC and SC-GLDPC ensembles allows to obtain the optimal (asymptotically in the large blocklength limit) scaling factors for iBDD-SR of PCs and spatially coupled product-like such as staircase codes, respectively. Our simulation results show that iBDD-SR remarkably outperforms iBDD for both PCs and staircase codes, and performs very close to the (genie-aided) miscorrection-free iBDD.
The proposed algorithm is a promising solution for very high-throughput applications such as fiber-optic communications. For instance, the 400G ZR standard for transmission at 400Gbps over data center interconnect links up to 100 km, has agreed on an FEC scheme consisting of the concatenation of an inner Hamming code decoded soft and an outer staircase code with hard decision decoding.
Related work includes [28, 29], and [30]. All these algorithms require the knowledge of the least reliable bits in the decoding process, and are significantly more complex than the proposed algorithm.
Notation: We use boldface letters to denote vectors and matrices, e.g., and , with representing the element corresponding to the -th row and -th column of . denotes the absolute value of , \mathopen{}\mathclose{{}\left\lfloor a}\right\rfloor the largest integer smaller than or equal to , and \mathopen{}\mathclose{{}\left\lceil a}\right\rceil the smallest integer larger than or equal to . A Gaussian distribution with mean and variance is denoted by . The Hamming distance between vectors and is denoted by .
II Preliminaries
Our focus is on two main classes of product-like codes, namely two-dimensional PCs and staircase codes.
II-A Product Codes and Staircase Codes
We consider two-dimensional PCs with the same component code for the row and column codes. However, we remark that the proposed decoding algorithm extends in a straightforward manner to more general PCs, where the row and column codes are not necessarily the same.
Let be an binary linear code, where , , and are the code length, dimension, and minimum Hamming distance, respectively. A (two-dimensional) PC with parameters and code rate based on component code is defined as the set of all arrays such that each row and column of the array is a codeword of . A codeword of the PC can thus be represented as a binary matrix of size . Fig. 1 shows the code array of a PC with component codes of length , where the code bit and the row and column constraints in which participates are highlighted.
PCs can be represented by a Tanner graph, where variable nodes (VNs) represent code bits and constraint nodes (CNs) represent row and column codes, respectively. For a PC with component code length , the corresponding Tanner graph has degree- VNs (each of the code bits participates in code constraints, a row constraint and a column constraint) and degree- CNs ( bits participate in each code constraint). PCs are contained in the ensemble of GLDPC codes described by the Tanner graph in Fig. 2, where each CN corresponds to a block code of length (the component code of the PC). Note that the Tanner graph of a PC is a particular instance of the Tanner graph in Fig. 2, where the connectivity between VNs and CNs is deterministic.
A binary staircase code is defined by a two-dimensional code array that has the form of a staircase. Formally, given a component code of length , a staircase code is defined as the set of all matrices of size , , such that each row of the matrix is a codeword of . is initialized to all zeros and the code rate is [8]. We will refer sometimes to the matrices as blocks. In Fig. 1, we plot the code array corresponding to the first four spatial positions of a staircase code with component codes of length . The code bit and the row and column constraints in which participates are highlighted.
A staircase code can be seen as a class of spatially coupled codes and as such it can be interpreted as spanning over a number of spatial positions, where the code bits in position correspond to the code bits , i.e., each spatial position contains two blocks of code bits. We will denote the code bits in position by the matrix , of dimensions .
As PCs, staircase codes can also be represented by a Tanner graph and as such can be seen as an instance of a SC-GLDPC code ensemble. The Tanner graph of a SC-GLDPC code ensemble of coupling memory is constructed by placing copies of a regular GLDPC code of VN degree and CN degree in spatial positions in the set . Each spatial position consists of CNs and VNs. The copies are then coupled as follows: each VN at position is connected to CNs in positions in the range , chosen uniformly at random. Likewise, each CN at position is connected to randomly chosen VNs at positions in the range . This chain of coupled codes may be terminated by appending spatial positions with CNs only at the end of the chain. The Tanner graph of a staircase code is contained in the Tanner graph of a SC-GLDPC code ensemble with VN degree , coupling memory , and degree- VNs and and degree- CNs per spatial position. The Tanner graph of such a SC-GLDPC code ensemble, originally considered in [27], is depicted in Fig. 2.
The connection between PCs and GLDPC codes and between staircase codes and SC-GLDPC codes, allows the use of tools for the analysis of codes-on-graphs, such as density evolution, to analyze PCs.
II-B Channel Model
We assume transmission over the binary-input additive white Gaussian noise (bi-AWGN) channel. For simplicity, for the definitions below we assume transmission using a PC. The channel output corresponding to code bit is given by
[TABLE]
where , , and is the signal to noise ratio. We denote by the matrix of channel log-likelihood ratios (LLRs) and by the matrix of hard decisions at the channel output, where is obtained by computing the sign of and mapping and . We denote this mapping by , i.e., . With some abuse of notation, we also write .
For the case of staircase codes, the matrices of LLRs and hard decisions must be defined per each spatial position, i.e., we define and , of dimensions , in accordance to .
Remark: The target application for the proposed decoding algorithm is very high throughput applications. A salient application is next generation fiber-optic links, which will support throughputs up to 1 Tb/s. The optical channel in practical scenarios such as wavelength division multiplexing can be approximated with the well-established Gaussian noise (GN) model [31]. The gist of the GN model is that the interplay between Kerr nonlinearity and chromatic dispersion in the optical channel can be accurately modeled as a Gaussian noise under some mild conditions. Thus, the bi-AWGN channel considered in this paper is also relevant for this particularly interesting application.
II-C Bounded Distance Decoding
Consider now the decoding of an arbitrary row or column component code, assuming that the codeword is transmitted and decoding is based on the hard-detected bits at the channel output, . BDD corrects all error patterns with Hamming weight up to the error-correcting capability of the code t=\mathopen{}\mathclose{{}\left\lfloor\frac{d_{\mathsf{min}}-1}{2}}\right\rfloor. If the weight of the error pattern is larger than and there exists another codeword with , then BDD erroneously decodes onto and a so-called miscorrection occurs. Otherwise, if such codeword does not exist, BDD fails and we use the convention that the decoder outputs . Thus, the decoded vector for BDD can be written as
[TABLE]
The decoding of product-like codes can then be accomplished in an iterative fashion based on BDD of the component codes and iterating between the row and column decoders. Here, we refer to iterative decoding of product-like codes based on BDD of the component codes as iBDD.
III Iterative Bounded Distance Decoding With Scaled Reliability
In this section, we propose a modification of the conventional iBDD of product-like codes. The main idea is to exploit the channel reliabilities in the decoding of the component codes, while only binary messages are exchanged between the component decoders. We refer to this algorithm as iBDD with scaled reliability (iBDD-SR). The proposed algorithm applies to product-like codes in general, including, e.g., PCs, half PCs [32], staircase codes, and braided codes. For illustration purposes, we focus on PCs and staircase codes.
III-A Iterative Bounded Distance Decoding with Scaled Reliability for Product Codes
Without loss of generality, assume that decoding starts with the decoding of the row codes and, in particular, consider the decoding of the th row code at iteration .
Let be the matrix of hard decisions on code bits after the decoding of the column codes at iteration . Row decoding is then performed based on . First, BDD is performed. The output of the BDD stage of the th row component code corresponding to code bit , denoted by , takes values on a ternary alphabet, , where the decoded bits are mapped according to and if BDD is successful, and the output is [math] if a decoding fails.
The reliability information on code bit is then formed according to
[TABLE]
where is a scaling factor corresponding to the reliability of the decision on at the output of the BDD (it may be different for each iteration) that should be properly optimized. In [26] we optimized the scaling factors for PCs based on simulations. Unfortunately a simulation-based approach becomes infeasible for spatially-coupled product-like codes such as staircase codes. In Section IV-A, we show that the scaling factors can be found via density evolution, which renders the search (and hence the decoder design) feasible.
Finally, the hard decision on code bit made by the th row decoder is formed as
[TABLE]
where ties can be broken with any policy.
The hard decision is the message passed from the -th row code to the -th column code. In particular, after applying this procedure to all row codes, the matrix is formed and used as the input for the column decoders, and column decoding based on is performed. As before, we assume that the output of the BDD stage of the th column component code corresponding to code bit , denoted by , takes values on . Then, the hard decision on made by the th column decoder at iteration is formed as
[TABLE]
where is the reliability of code bit . After decoding of the column codes at decoding iteration , the matrix is passed to the row decoders for the next decoding iteration. The iterative process continues until a maximum number of iterations is reached. The iBDD-SR of PCs is schematized in Fig. 3.
The crucial modification in iBDD-SR with respect to conventional iBDD is that the hard decisions passed between component decoders are not simply the result of the BDD of the component codes, but are made on the sum of a scaled version of the output of the BDD decoder and the channel LLR. Therefore, the channel reliabilities are exploited to make the final hard decisions at each row and column decoding stage. Intuitively, since the channel reliability is exploited in the hard decisions at each row and column decoding, in the case that the reliability of the channel is high and conventional iBDD introduces miscorrections, the modified algorithm may combat the possible miscorrections.
III-B Iterative Bounded Distance Decoding with Scaled Reliability for Staircase Codes
Similar to PCs, staircase codes can be decoded iteratively. Decoding of staircase codes is typically performed in a sliding-window fashion, iterating between the row and column decoders within a window containing a number of staircase blocks and after a given number of iterations shifting the window by one staircase block [8]. Thus, the iBDD-SR of PCs described in the previous subsection readily extends to staircase codes. However, in this case, the scaling factors may be different for each spatial position, and this needs to be considered when optimizing them.
IV Density Evolution of iBDD-SR
In this section, we provide the density evolution analysis for GLDPC codes and SC GLDPC codes, which contain PCs and staircase codes as particular cases for a certain choice of parameters. The analysis provides, as a byproduct, the optimal scaling factors of iBDD-SR (optimal in an asymptotic sense, for infinitely long block length [25]). Note that for finite block length, the scaling factors derived from the density evolution analysis are not necessarily the ones that minimize the error probability. However, selecting the scaling factors based on density evolution avoids resorting to an optimization based on Monte-Carlo simulations, which may be very time-consuming, and is unfeasible for staircase codes. Furthermore, interestingly, comparing the performance of iBDD-SR with scaling factors derived from the density evolution to that with scaling factors found by simulations111Note that due to the limitation of resources, a full exhaustive search is infeasible, i.e., only a grid search with a certain accuracy (step size) is possible., we have observed that the finite length performance of the former is always slightly better.
As discussed in Section II-A, PCs and staircase codes are contained in a particular GLDPC and SC-GLDPC code ensemble, respectively, whose asymptotic behavior can be rigorously analyzed via density evolution. In [27], the density evolution of iBDD for transmission over the binary symmetric channel (BSC) was derived. In this section, we derive the density evolution of iBDD-SR for GLDPC code ensembles and SC-GLDPC code ensembles by extending the density evolution of conventional iBDD in [27] to the iBDD-SR case. It is worth mentioning that product-like codes are structured codes and therefore their decoding threshold is not necessarily fully characterized by the threshold of the corresponding GLDPC code ensemble. In [33], the rigorous density evolution analysis that characterizes the asymptotic decoding performance over the binary erasure channel (BEC) of a deterministic construction of product-like codes that encompasses several classes of product-like codes such as irregular PCs, block-wise braided codes, and staircase codes, was derived. Its extension to the BSC, however, is very cumbersome. In practice, for the BEC the thresholds predicted by the rigorous density evolution and those predicted by the density evolution of the corresponding GLDPC ensemble are virtually identical [33, 34]. Thus, in this paper we opt to derive the density evolution of iBDD-SR for the GLDPC and SC-GLDPC ensembles encompassing PCs and staircase codes.
The GLDPC codes that we consider here can be represented graphically by a Tanner graph where each VN is connected to two CNs, corresponding to one row and one column code (see Section II-A and Fig. 2). We consider the iterative hard decision decoding algorithm based on extrinsic BDD of the component codes proposed in [27]. In particular, at the -th VN, the input message from the -th CN is forwarded to the -th CN. At the -th CN, the input corresponding to the -th VN is replaced by the hard-detected bit at the channel output. This message passing algorithm is illustrated in Fig. 4. Note that substituting the -th VN message with makes the decoding rule extrinsic, i.e., the decision on the -th VN does not depend on previous decisions inside the decoder. The extrinsic decoding rule is essential for the density evolution analysis.
IV-A Density Evolution Analysis of iBDD-SR for GLDPC Code Ensembles
We consider transmission over the bi-AWGN channel and analyze the decoder behavior by assuming the transmission of the all-zero codeword. At the CNs, we assume a length- binary component code with error-correcting capability .
We denote the channel output error probability, i.e., the error probability that would be attained by applying a hard detection to the bi-AWGN channel output, as . For an arbitrary row/column BDD stage, we denote by P^{\mathsf{e}}\mathopen{}\mathclose{{}\left(i}\right) the probability that a randomly selected bit in the component code’s codeword is decoded incorrectly when it was initially in error and there are errors in the other positions, and by P^{\mathsf{c}}\mathopen{}\mathclose{{}\left(i}\right) the probability that a randomly selected bit in the component code’s codeword is decoded correctly when it was initially in error and there are errors in the remaining positions. The probability that a randomly selected bit in the component code’s codeword is erased when it was initially in error and there are errors in the remaining positions is denoted by . We have obviously that P^{\epsilon}\mathopen{}\mathclose{{}\left(i}\right)=1-{P^{\mathsf{e}}}\mathopen{}\mathclose{{}\left(i}\right)-{P^{\mathsf{c}}}\mathopen{}\mathclose{{}\left(i}\right). Similarly, we denote by Q^{\mathsf{e}}\mathopen{}\mathclose{{}\left(i}\right), Q^{\mathsf{c}}\mathopen{}\mathclose{{}\left(i}\right), and the probability that a randomly selected bit in the component code’s codeword is decoded incorrectly, correctly, and erased, respectively, when the bit was initially correct and there are errors in the remaining positions. Note that Q^{\epsilon}\mathopen{}\mathclose{{}\left(i}\right)=1-Q^{\mathsf{e}}\mathopen{}\mathclose{{}\left(i}\right)-Q^{\mathsf{c}}\mathopen{}\mathclose{{}\left(i}\right).
We have that
[TABLE]
and
[TABLE]
where and is defined as
[TABLE]
In (5), is the weight enumerator of the component code, which can be tightly approximated as
[TABLE]
Similarly, one can compute {P^{\mathsf{c}}}\mathopen{}\mathclose{{}\left(i}\right) and Q^{\mathsf{e}}\mathopen{}\mathclose{{}\left(i}\right) as
[TABLE]
and
[TABLE]
where and is defined as
[TABLE]
For ease of understanding, we briefly explain the derivation of {P^{\mathsf{e}}}\mathopen{}\mathclose{{}\left(i}\right) in (5) in the appendix. The derivation of , , and follows a similar reasoning.
For the considered GLDPC code ensemble, CNs are divided into two sets of equal size to capture the serial row/column decoding schedule of PCs. Each set defines a CN type. We refer to the two CN types as row and column CN types. Each VN is connected to one row-type CN and to one column-type CN. Each decoding iteration consists of a row CN elaboration, followed by a column CN elaboration. In the following, we denote by the error probability associated to the messages exchanged by the component decoders. In particular, we denote by and the message error probability at the output of the row component decoder (row-type CN) and column component decoder (column-type CN), respectively, at the th iteration. The message error probability at the input of a row-type CN at the th iteration is given by , whereas the message error probability at the input of a column-type CN during the th iteration is . At the first iteration, we have , i.e., the input of the row-type CNs is initialized with the channel observations.
In iBDD-SR, the output of the BDD decoder is from a ternary alphabet, i.e., (see Section (III-A)), where (under the all-zero codeword assumption) , , and correspond to erasure (failure), erroneous decoding, and correct decoding, respectively. In the following, the probabilities of , , and conditioned on are denoted as , , and , respectively, for a given input message error probability and a channel error probability . One can check that
[TABLE]
[TABLE]
[TABLE]
where .
Under the all-zero codeword assumption, one can readily find that . Note that for the density evolution, as all row CNs and all column CNs are of the same type (i.e., they behave identically), we can assume that and for all . We are now interested in finding (alternatively ), as the iBDD-SR output error probability for the row (column) decoding. To proceed further, one needs to find the distribution of . The task of finding this distribution is rendered complicated by observing that the messages and are statistically dependent on . In fact, the evolution of the error probability at the output of the CNs discussed so far is based on the approach proposed in [27], where the CN operation is modified (with respect to the classical behavior) to account for the channel observation when computing the extrinsic terms and . In our model, the BDD output message is modified according to the sum , hence the channel observation for code bit is used at both the BDD input and output. Here instead of finding directly the distribution of , we first expand using the auxiliary RV giving the sign of , i.e., . Employing Bayes’ rule, can be written as
[TABLE]
It is easy to see that form a Markov chain, hence, conditioned on , is independent of . Using this,
[TABLE]
One can easily check that and . Using this in (IV-A) yields
[TABLE]
Further, and can be obtained based on Q^{\mathsf{e}}\mathopen{}\mathclose{{}\left(i}\right) and P^{\mathsf{c}}\mathopen{}\mathclose{{}\left(i}\right) as
[TABLE]
[TABLE]
Finally, by substituting (IV-A) and (IV-A) in (IV-A) and using the Gaussian distribution of to compute and , we can track the evolution of the message error probabilities as
[TABLE]
and
[TABLE]
where is the familiar tail distribution function of the standard Gaussian distribution and p_{\mathsf{ch}}=\mathsf{Q}\mathopen{}\mathclose{{}\left(\frac{1}{\sigma}}\right).
One can numerically search for the optimal scaling factors and in the sense of minimizing and , respectively. Alternatively, by neglecting the statistical dependence between and one can approximate and as the LLR of the output of a binary error and erasure channel with error probability and erasure probability , given as
[TABLE]
and
[TABLE]
Employing (34) and (35) yields very similar scaling factors as the ones obtained performing a numerical search. Furthermore, the code threshold given by the scaling factors in (34) and (35) is roughly the same as the one computed based on the numerically optimized scaling factors. Therefore, (34) and (35) provide a good approximation for and , respectively. The obtained scaling factors can then be used in (3) to implement iBDD-SR for a particular finite-length PC.
IV-B Density Evolution Analysis of iBDD-SR for SC-GLDPC Code Ensembles
The density evolution for GLDPC codes derived in the previous subsection can be readily extended to SC-GLDPC codes with smoothing parameter . For SC-GLDPC codes, we need to track the probabilities of the messages exchanged in the iterative decoding for each spatial position. Let be the average bit error probability from VNs at spatial position to the connected CNs at spatial positions . Also, let be the average bit error probability from CNs at spatial position to connected VNs at positions . and can be calculated as
[TABLE]
[TABLE]
We consider to account for the ensemble containing staircase codes. Thus, combining (36) and (IV-B), we obtain
[TABLE]
where and are given as
[TABLE]
[TABLE]
Similar to the GLDPC code ensemble, and can be obtained as
[TABLE]
[TABLE]
We consider the decoding of staircase codes based on the sliding-window operation. To account for the effect of window decoding, we assume that the width of the window is , i.e., the window contains spatial positions. Let be the set containing the indices of the spatial positions in the current window. In window decoding, the decoder freezes the messages coming from the VNs and CNs outside the window, i.e., the VNs and CNs inside the window are updated based on the information exchanged inside the window and no information comes from the positions outside it. In the particular case of staircase codes, which are contained in the ensemble of SC-GLDPC codes with , the first and last positions inside the window do not get any information from the positions outside it. Therefore, one can define as
[TABLE]
and use it in (38)–(42) to find the average bit error probability for the spatial positions within the window.
V Complexity Considerations
A thorough complexity analysis of the iBDD-SR algorithm requires delving into the hardware implementation in order to address aspects such as data bus requirements, impact on the degree of parallelism, etc., that go beyond the scope of this paper. We refer the interested reader to [35], where an efficient architecture for iBDD-SR of PCs is presented. In the following, we provide a high-level discussion of the decoding complexity. In particular, we estimate the additional resources required in terms of memory with respect to iBDD for both PCs and staircase codes. We also compare the complexity of iBDD-SR with that of AD [22] in terms of memory requirements.
Consider a PC with BCH component code of error correcting capability decoded over iterations. iBDD-SR requires some extra memory compared to iBDD. With reference to (3), the decision on code bit at iteration can be divided into two cases: i) if or BDD fails (i.e., ); and ii) if BDD is successful and . By storing the channel LLRs () and , one can implement (3) with a simple logic comparison. Using bits for quantization of and , the additional memory required for iBDD-SR compared to iBDD is bits.222Note that .
Consider now a staircase code with an (even length) BCH component code decoded using a sliding window of size . We remark that the corresponding SC-GLDPC code ensemble comprises spatial positions, i.e., the window size for the corresponding SC-GLDPC ensemble is . In general, the scaling factors may be different for each spatial position (and vary also with the number of iterations). This could be impractical. as many scaling factors would be required to be stored. Interestingly, as discussed in Section VI, the density evolution for SC-GLDPC code ensembles shows that the scaling factors converge to certain values after few () window slides, after which the scaling factors are identical for each window. Thus few scaling factors need to be stored. Therefore, the additional memory required for the decoding of one staircase block in iBDD-SR compared to iBDD is 333Note that the typical window size is in the range of – blocks, hence ..
We remark that the required memory for both PCs and staircase codes is static, i.e., no switching activities are involved, as the LLRs and scaling factors are not updated in the iterative decoding. This means that the additional memory has a limited cost in terms of energy consumption for the decoder [36, 35].
The direct complexity comparison with AD algorithm is a non trivial task, as AD can be implemented in various ways (see [22, Remark 7]). In a high level view, AD assigns a flag to each component code, which indicates the corresponding status in decoding. Furthermore, AD reduces the decoding conflicts between component decoders by keeping track of the conflict locations and preventing the bit flips on the most trusted component codes, called anchors. As the anchors can also be miscorrected, AD allows to backtrack the decisions on anchors. Overall, a memory in the order of bits is required for storing the status of the component codes. Also 4nt\mathopen{}\mathclose{{}\left({\mathopen{}\mathclose{{}\left\lceil{{{\log}_{2}}n}}\right\rceil+1}}\right) bits are required for storing the location of conflicts and backtracking procedure (see [22, Sec. VI. B] for more details). Unlike the static memory of iBDD-SR, the memory required for AD is dynamic, as the status of component codewords and the location of errors changes during the iterative decoding. The dynamic memory is usually significantly more costly in hardware implementation compared to the static counterpart [36].
Note that in iBDD-SR only binary messages are exchanged between component decoders, hence the internal decoder data flow is the same as that of iBDD. Thus, iBDD-SR is particularly interesting for very high-throughput applications, for which the internal decoder data flow is a limiting factor.
VI Numerical Results
To evaluate the performance of iBDD-SR, we simulate the transmission of two PCs with (,,) BCH component codes and (,,) BCH component codes and two staircase codes with the same component codes shortened by one bit (i.e., (,,) and (,,)), over the bi-AWGN channel.444We are particularly interested in the performance of codes based on BCH component codes with , since their decoders can be efficiently implemented via lookup tables [8, Appendix I]. The code rate of the resulting product codes is and for and , respectively. The code rate of the staircase codes is and for and , respectively. For the sake of comparison, we also simulate the performance of the codes under iBDD, ideal iBDD (i.e., a genie-aided iBDD where misscorrections are avoided by providing the component decoder input at its output whenever the error correction capability of the component code is exceeded), and AD. The BER performance of the considered codes is shown in Figs. 5-6.
It is important to remark that if the channel LLRs are highly reliable but with wrong sign, one can expect that the decoding rule in (3)–(4) will be unable to recover from these errors. In this situation, although may correspond to a correct decision, it is overridden by the channel, i.e., the hard decision on code bit made by the -th row decoder, , becomes (cf. (3) and (4)), which leads to an erroneously decoded bit. Therefore, one needs to be careful when applying iBDD-SR to avoid the appearance of an error floor. In particular, to avoid such errors and the presence of a high error floor, we run iBDD-SR for some iterations and then we append a few conventional iBDD iterations, where the channel reliabilities are disregarded when making the decision on a given code bit. The appended iBDD iterations increase the chance to correct transmission errors with high channel reliability. By doing so, an error floor is avoided. For PCs, we consider a maximum of iBDD-SR iterations followed by conventional iBDD iterations. For a fair comparison, for iBDD, ideal iBDD, and AD, we use a maximum of iterations. For staircase codes, we use a window decoder with window size of blocks and a maximum of iBDD-SR iterations followed by conventional iBDD iterations.
Table I summarizes the gains of iBDD-SR, ideal iBDD, and AD over conventional iBDD (fifth column) and the gap to the corresponding capacity (sixth column) at the BER of for both PCs and staircase codes with BCH component codes of parameters (,,) and (,,), respectively. Whether the decoder exploits the channel reliabilities and the nature of the messages exchanged in the iterative decoding (hard or soft) is indicated in the third and fourth column, respectively. iBDD-SR yields a performance gain of dB and dB with respect to iBDD for the PC and the staircase code, respectively. For very high-throughput applications such as fiber-optic communications such gains are significant. Furthermore, one can see that iBDD-SR performs close to the ideal iBDD for both PCs and staircase codes. Interestingly, the staircase code with iBDD-SR outperforms the PC with ideal iBDD by dB at a BER of .
In Table II, we give the gains of iBDD-SR, ideal iBDD, and AD over conventional iBDD and the gap to the corresponding capacity at the BER of for both PCs and staircase codes with BCH component codes of parameters (,,) and (,,), respectively. Compared to the shorter block length, one can see that iBDD-SR yields similar gains with respect to iBDD, albeit slightly smaller. Also, the gap between iBDD-SR and ideal iBDD reduces even further. In particular, for the staircase code iBDD-SR performs almost the same as miscorrection-free decoder. Furthermore, the gap to capacity for all decoders is also reduced.
From the GN model, one can see that an optical link SNR improvement of dB yields dB of optical reach enhancement [37, Eq. 59]. Thus, the dB performance improvement of iBDD-SR over iBDD yields about of reach enhancement. We also remark that for extended BCH component codes with , not reported here, the gain of iBDD-SR with respect to iBDD is slightly larger and iBDD-SR performs almost identical as conventional iBDD (see Fig. 3 in [30] for a curve).
In Fig. 7, we show the evolution of the scaling factors resulting from the density evolution for the GLDPC code ensemble with BCH component code (,,) as a function of the number of half iterations, where each iteration corresponds to one row or column decoding step. The scaling factors in Fig. 7 are obtained at the decoding threshold, which is dB. As can be seen, the scaling factors are monotonically increasing over iterations. This is expected, as the reliability of the BDD output increases with the number of iterations. In Fig. 8, we show the evolution of the scaling factors for the SC-GLDPC code ensemble with the same component code. In the figure, corresponds to the vector of scaling factors corresponding to the -th position inside the decoding window (of size ) containing spatial positions . In particular, the figure plots the scaling factors obtained by the density evolution (at the code threshold, i.e., dB) for the -th spatial position inside the windows. Note that after () window slides, the scaling factors converge to a given value. The same phenomenon has been observed for other spatial positions within the window and other ensembles. Thus, from a practical viewpoint, it is not necessary to store the scaling factors for every spatial position, but only for a limited number of positions.
It is important to remark that the density evolution in Section IV-A assumes the exchange of extrinsic information between component decoders. However, extrinsic message passing decoding of product-like codes (as explained in Section IV-A and [27] for iBDD-SR and iBDD, respectively) is complex, as it requires that the component codes are decoded times in each iteration. In practice, when very high throughputs are required, product-like codes are hence decoded using conventional iterative row/column decoding of the component codes, i.e., intrinsic message passing, and this is the algorithm that we used for the simulations. Thus, the scaling factors are obtained for a slightly different decoder than the one used in practice. One may then wonder how good the scaling factors derived for the extrinsic message passing are for the conventional decoder. To verify the impact of using the scaling factors found from the density evolution for finite-length codes with conventional row/column decoding, we also performed a search based on Monte-Carlo simulations to optimize the scaling factors for PCs, with a grid search of step size of . Interestingly, the performance of iBDD-SR with scaling factors from the density evolution yields slightly better results (probably due to the non-exhaustive limited Monte-Carlo search), supporting that their derivation using the density evolution is very useful in practice. Also, we would like to stress that the Monte-Carlo search is not feasible for staircase codes, thus the derived density evolution is crucial in the design of iBDD-SR in this case.
VII Conclusion
We proposed iterative bounded distance decoding with scaled reliability, a new decoding algorithm for the decoding of product-like codes. The proposed algorithm, based on BDD of the component codes, exploits the channel reliabilities but, notably, is a binary message passing algorithm, i.e., the component decoders exchange only hard decisions. The proposed algorithm improves the performance of conventional iBDD, with the same decoder data flow, at the expense of a minor increase in complexity. For two particular PCs and staircase codes built from BCH component code codes ) and (shortened by one bit for staircase codes), the proposed algorithm outperforms conventional iBDD by – dB and yields performance very close to that of ideal iBDD without miscorrections. For a PC with BCH component codes, in [35] we implemented iBDD-SR in a 28nm process technology, achieving 1 Tb/s with an area and energy dissipation less than half of that of staircase decoders, at similar estimated net coding gains.
The proposed algorithm is appealing for applications requiring very high throughputs such as fiber-optic communications.
Appendix
We clarify the derivation of {P^{\mathsf{e}}}\mathopen{}\mathclose{{}\left(i}\right). Recall that {P^{\mathsf{e}}}\mathopen{}\mathclose{{}\left(i}\right) corresponds to the probability that BDD results in a codeword (within Hamming distance of the input vector, see (2)) that has an error in the randomly selected position, given that the input vector has an error in that position and contains errors in the other positions. One can easily see that if , the total number of errors is less than or equal to , meaning that the decoder is able to correct the codeword, therefore {P^{\mathsf{e}}}\mathopen{}\mathclose{{}\left(i}\right)=0. On the other hand, if , the Hamming distance between the input vector and the all-one codeword is less than or equal to , therefore BDD decodes onto the all-one codeword and the randomly selected position will always be in error, i.e., {P^{\mathsf{e}}}\mathopen{}\mathclose{{}\left(i}\right)=1.
The nontrivial case corresponds to . In this case, we need to compute the probability that there exists a codeword that has a one in the randomly-chosen position and is within Hamming distance of the weight- vector at the input of the bounded distance decoder, which we denote by . To do so, we can exploit the weight enumerator of the BCH code, , and consider the equivalent problem of computing the probability that, given a codeword of a given weight, the randomly selected bit for the input vector corresponds to an entry where is one and the other ones of the input vector are placed such that .
We proceed as follows. Consider codewords of weight , the total number of which is . For a given codeword of weight , the probability that the randomly selected erroneous bit is chosen among the codeword bit positions that are one is . Now, assume that the input vector has ones in out of the entries (one entry is already fixed) where the given codeword has ones. Thus, the input vector has ones in out of the entries where the given codeword is zero. The number of possibilities is
[TABLE]
and
[TABLE]
respectively, where we defined for convenience. Thus, the probability that this occurs is
[TABLE]
which we defined as in (7).
Finally, we need to sum over all cases such that and the candidate codeword are within Hamming distance . Note that and we need that . Thus, we need to sum over and subsequently , which results in the expression in (5).
Acknowledgment
The authors would like to thank Dr. Christian Häger and Prof. Henry Pfister for fruitful discussions and providing the simulation results of AD in Figs. 5–6.
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