Routing in Networks on Chip with Multiplicative Circulant Topology

TL;DR

This paper explores the use of multiplicative circulant topologies for networks-on-chip, proposing a scalable routing algorithm tailored to this topology to improve efficiency in multi-core processor systems.

Contribution

It introduces a novel routing algorithm specifically designed for multiplicative circulant topologies in networks-on-chip, addressing scalability and topology-specific features.

Findings

Routing algorithm demonstrates high scalability

Topology improves routing efficiency in multi-core systems

Potential for optimized network-on-chip designs

Abstract

The development of multi-core processor systems is a demanded branch of science and technology. The appearance of processors with dozens and hundreds of cores poses to the developers the question of choosing the optimal topology capable to provide efficient routing in a network with a large number of nodes. In this paper, we consider the possibility of using multiplicative circulants as a topology for networks-on-chip. A specialized routing algorithm for networks with multiplicative circulant topology, taking into account topology features and having a high scalability, has been developed.