Integrated magnonic half-adder

TL;DR

This paper demonstrates a numerical design of an integrated magnonic half-adder circuit using nonlinear directional couplers, advancing the development of low-power, high-speed magnonic computing systems.

Contribution

It introduces a novel integrated magnonic circuit with a nonlinear directional coupler functioning as XOR and AND gates, enabling all-magnon information processing.

Findings

Potential for sub-aJ energy consumption per operation

Successful numerical demonstration of a magnonic half-adder

Circuit composed of only three nano-waveguides

Abstract

Spin waves and their quanta magnons open up a promising branch of high-speed and low-power information processing. Several important milestones were achieved recently in the realization of separate magnonic data processing units including logic gates, a magnon transistor and units for non-Boolean computing. Nevertheless, the realization of an integrated magnonic circuit consisting of at least two logic gates and suitable for further integration is still an unresolved challenge. Here we demonstrate such an integrated circuit numerically on the example of a magnonic half-adder. Its key element is a nonlinear directional coupler serving as combined XOR and AND logic gate that utilizes the dependence of the spin wave dispersion on its amplitude. The circuit constitutes of only three planar nano-waveguides and processes all information within the magnon domain. Benchmarking of the proposed device is performed showing the potential for sub-aJ energy consumption per operation.