In-Memory and Error-Immune Differential RRAM Implementation of Binarized Deep Neural Networks

TL;DR

This paper demonstrates a differential RRAM memory structure that enables error-immune, energy-efficient binarized neural networks suitable for image recognition, without the need for error correction overhead.

Contribution

It introduces a differential HfO2-based RRAM design that achieves error immunity and high reliability for in-memory neural network implementation, surpassing previous methods.

Findings

Achieves error immunity comparable to error correction without CMOS overhead.

Enables low-voltage programming with high endurance of billions of cycles.

Successfully implements binarized deep neural networks for image recognition.

Abstract

RRAM-based in-Memory Computing is an exciting road for implementing highly energy efficient neural networks. This vision is however challenged by RRAM variability, as the efficient implementation of in-memory computing does not allow error correction. In this work, we fabricated and tested a differential HfO2-based memory structure and its associated sense circuitry, which are ideal for in-memory computing. For the first time, we show that our approach achieves the same reliability benefits as error correction, but without any CMOS overhead. We show, also for the first time, that it can naturally implement Binarized Deep Neural Networks, a very recent development of Artificial Intelligence, with extreme energy efficiency, and that the system is fully satisfactory for image recognition applications. Finally, we evidence how the extra reliability provided by the differential memory allows programming the devices in low voltage conditions, where they feature high endurance of billions of cycles.