# New Family of Stream Ciphers as Physically Clone-Resistant VLSI-Structures

## TL;DR

This paper introduces a large class of physically clone-resistant stream ciphers based on randomly selected NLFSRs, enabling secure, self-reconfigurable FPGA-based identities with scalable security, suitable for future smart VLSI systems.

## Contribution

It proposes a novel large class of physically clone-resistant stream ciphers using NLFSRs and introduces a method for creating self-created, physically unclonable identities within FPGA devices.

## Key findings

- Security levels are scalable even against post-quantum threats.
- The design achieves high linear complexity and long periods.
- A lightweight identification protocol for FPGA-based SUC is presented.

## Abstract

A new large class of $2^{100}$ possible stream ciphers as keystream generators KSGs, is presented. The sample cipher-structure-concept is based on randomly selecting a set of 16 maximum-period Nonlinear Feedback Shift Registers (NLFSRs). A non-linear combining function is merging the 16 selected sequences. All resulting stream ciphers with a total state-size of 223 bits are designed to result with the same security level and have a linear complexity exceeding $2^{81}$ and a period exceeding $2^{161}$. A Secret Unknown Cipher (SUC) is created randomly by selecting one cipher from that class of $2^{100}$ ciphers. SUC concept was presented recently as a physical security anchor to overcome the drawbacks of the traditional analog Physically Unclonable Functions (PUFs). Such unknown ciphers may be permanently self-created within System-on-Chip SoC non-volatile FPGA devices to serve as a digital clone-resistant structure. Moreover, a lightweight identification protocol is presented in open networks for physically identifying such SUC structures in FPGA-devices. The proposed new family may serve for lightweight realization of clone-resistant identities in future self-reconfiguring SoC non-volatile FPGAs. Such self-reconfiguring FPGAs are expected to be emerging in the near future smart VLSI systems. The security analysis and hardware complexities of the resulting clone-resistant structures are evaluated and shown to exhibit scalable security levels even for post-quantum cryptography.