# Gate tunable giant anisotropic resistance in ultra-thin GaTe

## TL;DR

This paper demonstrates that in ultra-thin GaTe, electrical resistance can be dynamically tuned over three orders of magnitude along different in-plane directions using a gate voltage, enabling novel anisotropic electronic devices.

## Contribution

It reveals gate-tunable giant anisotropic resistance in 2D GaTe and introduces a device architecture for anisotropic memory applications.

## Key findings

- Electrical conductivity ratio can be tuned from less than one to 10^3.
- Demonstration of anisotropic memory resistor behaviour.
- Potential for multifunctional directional memories in 2D electronics.

## Abstract

In crystals, the duplication of atoms often follows different periodicity along different directions. It thus gives rise to the so called anisotropy, which is usually even more pronounced in two dimensional (2D) materials due to the absence of $\textbf{z}$ dimension. Indeed, in the emerging 2D materials, electrical anisotropy has been one of the focuses in recent experimental efforts. However, key understandings of the in-plane anisotropic resistance in low-symmetry 2D materials, as well as demonstrations of model devices taking advantage of it, have proven difficult. Here, we show that, in few-layered semiconducting GaTe, electrical conductivity along $\textbf{x}$ and $\textbf{y}$ directions of the 2D crystal can be gate tuned from a ratio of less than one order to as large as 10$^{3}$. This effect is further demonstrated to yield an anisotropic memory resistor behaviour in ultra-thin GaTe, when equipped with an architecture of van der Waals floating gate. Our findings of gate tunable giant anisotropic resistance (GAR) effect pave the way for potential applications in nano-electronics such as multifunctional directional memories in the 2D limit.