# BOTDA Fiber Sensor System Based on FPGA Accelerated Support Vector   Regression

**Authors:** Huan Wu, Hongda Wang, Chiu-Sing Choy, Chester Shu, Chao Lu

arXiv: 1901.01141 · 2019-01-07

## TL;DR

This paper presents an FPGA-accelerated support vector regression system for BOTDA fiber sensors, significantly reducing post-processing time and energy consumption, enabling real-time dynamic sensing over long distances.

## Contribution

It introduces a hardware-accelerated SVR approach on FPGA for BOTDA data post-processing, achieving high speedup and energy efficiency improvements.

## Key findings

- Up to 42x speedup over software implementation.
- Post-processing time reduced to 0.46 seconds for large datasets.
- Energy efficiency increased by 226.1 times.

## Abstract

Brillouin optical time domain analyzer (BOTDA) fiber sensors have shown strong capability in static long haul distributed temperature/strain sensing. However, in applications such as structural health monitoring and leakage detection, real-time measurement is quite necessary. The measurement time of temperature/strain in a BOTDA system includes data acquisition time and post-processing time. In this work, we propose to use hardware accelerated support vector regression (SVR) for the post-processing of the collected BOTDA data. Ideal Lorentzian curves under different temperatures with different linewidths are used to train the SVR model to determine the linear SVR decision function. The performance of SVR is evaluated under different signal-to-noise ratios (SNRs) experimentally. After the model coefficients are determined, algorithm-specific hardware accelerators based on field programmable gate arrays (FPGAs) are used to realize SVR decision function. During the implementation, hardware optimization techniques based on loop dependence analysis and batch processing are proposed to reduce the execution latency. Our FPGA implementations can achieve up to 42x speedup compared with software implementation on an i7-5960x computer. The post-processing time for 96,100 BGSs along 38.44-km FUT is only 0.46 seconds with FPGA board ZCU104, making the post-processing time no longer a limiting factor for dynamic sensing. Moreover, the energy efficiency of our FPGA implementation can reach up to 226.1x higher than software implementation based on CPU.

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Source: https://tomesphere.com/paper/1901.01141