# Few-electrode design for silicon MOS quantum dots

## TL;DR

This paper presents a scalable silicon MOS quantum dot design with naturally formed tunnel barriers, tunable tunnel rates, and promising initial results for multi-dot arrays, advancing the development of large-scale spin qubit systems.

## Contribution

Introduction of a two-metal-layer MOS quantum dot device with natural tunnel barriers and high tunability, enabling scalable quantum dot arrays for quantum computing.

## Key findings

- Tunnel rate tunability of nearly 8.5 decades/V
- Valley splitting estimated at 290 μeV in the few-electron regime
- Preliminary characterization of a double quantum dot

## Abstract

Silicon metal-oxide-semiconductor (MOS) spin qubits have become a promising platform for quantum information processing, with recent demonstrations of high-fidelity single and two-qubit gates. To move beyond a few qubits, however, more scalable designs that reduce the fabrication complexity and electrode density are needed. Here, we introduce a two-metal-layer MOS quantum dot device in which tunnel barriers are naturally formed by gaps between electrodes and controlled by adjacent accumulation gates. The accumulation gates define the electron reservoirs and provide tunability of the tunnel rate of nearly 8.5 decades/V, determined by a combination of charge sensor electron counting measurements and by direct transport. The valley splitting in the few-electron regime is probed by magneto-spectroscopy up to a field of 6 T, providing an estimate for the ground-state gap of 290 $\mu$eV. We show preliminary characterization of a double quantum dot, demonstrating that this design can be extended to linear dot arrays that should be useful in applications like electron shuttling. These results motivate further innovations in MOS quantum dot design that can improve the scalability prospects for spin qubits.