MRAM Co-designed Processing-in-Memory CNN Accelerator for Mobile and IoT Applications

TL;DR

This paper presents a co-designed processing-in-memory CNN accelerator using MRAM technology, achieving high density and energy efficiency for mobile and IoT applications.

Contribution

It introduces a novel MRAM-based PIM architecture fabricated at 22nm, supporting multiple CNN models on a single chip.

Findings

Over 40MB MRAM density achieved

Energy efficiency of 9.9 TOPS/W

Supports multiple models on one chip

Abstract

We designed a device for Convolution Neural Network applications with non-volatile MRAM memory and computing-in-memory co-designed architecture. It has been successfully fabricated using 22nm technology node CMOS Si process. More than 40MB MRAM density with 9.9TOPS/W are provided. It enables multiple models within one single chip for mobile and IoT device applications.