Design Rule Violation Hotspot Prediction Based on Neural Network Ensembles

TL;DR

This paper introduces a neural network ensemble framework that predicts design rule violation hotspots early in the IC design process, reducing reliance on time-consuming routing checks and improving prediction accuracy.

Contribution

It develops a novel ensemble approach with soft voting and PCA-based feature selection, outperforming baseline neural networks and rivaling random forest models.

Findings

Significant performance improvement over baseline neural network.

Outperforms baseline neural network in 50% of test cases.

Achieves results comparable to random forest models.

Abstract

Design rule check is a critical step in the physical design of integrated circuits to ensure manufacturability. However, it can be done only after a time-consuming detailed routing procedure, which adds drastically to the time of design iterations. With advanced technology nodes, the outcomes of global routing and detailed routing become less correlated, which adds to the difficulty of predicting design rule violations from earlier stages. In this paper, a framework based on neural network ensembles is proposed to predict design rule violation hotspots using information from placement and global routing. A soft voting structure and a PCA-based subset selection scheme are developed on top of a baseline neural network from a recent work. Experimental results show that the proposed architecture achieves significant improvement in model performance compared to the baseline case. For half of test cases, the performance is even better than random forest, a commonly-used ensemble learning model.