Lithium ion intercalation in thin crystals of hexagonal TaSe2 gated by a polymer electrolyte

TL;DR

This study investigates ion intercalation in thin hexagonal TaSe2 crystals using polymer electrolyte gating, revealing how ion occupation affects electronic properties and enabling potential layered material engineering.

Contribution

It provides detailed insights into the microscopic ion intercalation process in TMDCs using combined fabrication and electrical measurement techniques.

Findings

Ion intercalation modulates charge density waves.

Intercalation affects scattering rates of charge carriers.

Gate voltage controls ion occupation and device characteristics.

Abstract

Ionic liquid gating has been used to modify properties of layered transition metal dichalcogenides (TMDCs), including two-dimensional (2D) crystals of TMDCs used extensively recently in the device work, which has led to observations of properties not seen in the bulk. The main effect comes from the electrostatic gating due to strong electric field at the interface. In addition, ionic liquid gating also leads to ion intercalation when the ion size of gate electrolyte is small compared to the interlayer spacing of TMDCs. However, the microscopic processes of ion intercalation have rarely been explored in layered TMDCs. Here, we employed a technique combining photolithography device fabrication and electrical transport measurements on the thin crystals of hexagonal TaSe2 using multiple channel devices gated by a polymer electrolyte LiClO4/PEO. The gate voltage and time dependent source-drain resistances of these thin crystals were used to obtain information on the intercalation process, the effect of ion intercalation, and the correlation between the ion occupation of allowed interstitial sites and the device characteristics. We found a gate voltage controlled modulation of the charge density waves and scattering rate of charge carriers. Our work suggests that ion intercalation can be a useful tool for layered materials engineering and 2D crystal device design.