STAIRoute: Early Global Routing using Monotone Staircases for Congestion Reduction
Bapi Kar, Susmita Sur-Kolay, and Chittaranjan Mandal

TL;DR
This paper introduces STAIRoute, an early global routing framework that uses monotone staircases for congestion reduction, enabling effective early detection of routing issues during physical design.
Contribution
It presents a novel early global routing algorithm that assesses routability and congestion using pattern routing after floorplanning, adaptable to technology scaling.
Findings
100% routing completion without over-congestion
Wirelength comparable to Steiner length by FLUTE
Effective vias estimation across capacity profiles
Abstract
With aggressively shrinking process nodes, physical design methods face severe challenges due to poor convergence and uncertainty in getting an optimal solution. An early detection of potential failures is thus mandated. This has encouraged to devise a feedback mechanism from a lower abstraction level of the design flow to the higher ones, such as placement driven synthesis, routability (timing) driven placement etc. Motivated by this, we propose an early global routing framework using pattern routing following the floorplanning stage. We assess feasibility of a floorplan topology of a given design by estimating routability, routed wirelength and vias count while addressing the global congestion scenario across the layout. Different capacity profiles for the routing regions, such as uniform or non-uniform different cases of metal pitch variation across the metals layers ensures…
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Taxonomy
TopicsVLSI and FPGA Design Techniques · VLSI and Analog Circuit Testing · Low-power high-performance VLSI design
