A High Accuracy and High Sensitivity System Architecture for Electrical Impedance Tomography System

TL;DR

This paper introduces a novel high-accuracy, high-sensitivity electrical impedance tomography system architecture that reduces noise, cancels gain fluctuations, and mitigates motion artifacts for improved measurement reliability.

Contribution

It presents a new system architecture using switched ratiometric technique that enhances sensitivity and accuracy in electrical impedance tomography read-out circuits.

Findings

Improved sensitivity of the read-out circuit.

Reduced effects of motion artifacts.

Enhanced system accuracy and noise cancellation.

Abstract

A high accuracy and high sensitivity system architecture is proposed for the read-out circuit of electrical impedance tomography system-on-chip. The switched ratiometric technique is applied in the proposed architecture. The proposed system architecture minimizes the device noise by processing signals from both read-out electrodes and the stimulus. The quantized signals are post-processed in the digital processing unit for proper signal demodulation and impedance ratio calculation. Our proposed architecture improves the sensitivity of the read-out circuit, cancels out the gain fluctuations in the system, and overcomes the effects of motion artifacts on measurements.