Practical Design Space Exploration

TL;DR

This paper introduces HyperMapper 2.0, a novel, interpretable framework for multi-objective design space exploration that effectively handles unknown constraints and categorical variables, improving optimization efficiency in hardware tuning.

Contribution

The paper presents HyperMapper 2.0, a new methodology and software that advances design space exploration by supporting unknown constraints, categorical variables, and user priors, with an interpretable model.

Findings

HyperMapper 2.0 outperforms state-of-the-art baselines in Pareto front quality.

It achieves up to 8x reduction in sampling budget.

The framework provides better hypervolume indicators across benchmarks.

Abstract

Multi-objective optimization is a crucial matter in computer systems design space exploration because real-world applications often rely on a trade-off between several objectives. Derivatives are usually not available or impractical to compute and the feasibility of an experiment can not always be determined in advance. These problems are particularly difficult when the feasible region is relatively small, and it may be prohibitive to even find a feasible experiment, let alone an optimal one. We introduce a new methodology and corresponding software framework, HyperMapper 2.0, which handles multi-objective optimization, unknown feasibility constraints, and categorical/ordinal variables. This new methodology also supports injection of the user prior knowledge in the search when available. All of these features are common requirements in computer systems but rarely exposed in existing design space exploration systems. The proposed methodology follows a white-box model which is simple to understand and interpret (unlike, for example, neural networks) and can be used by the user to better understand the results of the automatic search. We apply and evaluate the new methodology to the automatic static tuning of hardware accelerators within the recently introduced Spatial programming language, with minimization of design run-time and compute logic under the constraint of the design fitting in a target field-programmable gate array chip. Our results show that HyperMapper 2.0 provides better Pareto fronts compared to state-of-the-art baselines, with better or competitive hypervolume indicator and with 8x improvement in sampling budget for most of the benchmarks explored.