Achieving short high-quality gate-all-around structures for horizontal nanowire field-effect transistors

TL;DR

This paper presents a novel fabrication method for gate-all-around nanowire FETs that allows precise gate-length control and achieves sub-threshold swings as low as 38 mV/dec at 77 K, improving device performance.

Contribution

A new fabrication technique using resist-trench alignment and electron-beam lithography for precise, short gate-length gate-all-around nanowire transistors.

Findings

Achieved gate lengths down to 150 nm.

Demonstrated sub-threshold swing of 38 mV/dec at 77 K.

Fabricated devices with multiple independent gates.

Abstract

We introduce a fabrication method for gate-all-around nanowire field-effect transistors. Single nanowires were aligned perpendicular to underlying bottom gates using a resist-trench alignment technique. Top gates were then defined aligned to the bottom gates to form gate-all-around structures. This approach overcomes significant limitations in minimal obtainable gate length and gate-length control in previous horizontal wrap-gated nanowire transistors that arise because the gate is defined by wet etching. In the method presented here gate-length control is limited by the resolution of the electron-beam-lithography process. We demonstrate the versatility of our approach by fabricating a device with an independent bottom gate, top gate, and gate-all-around structure as well as a device with three independent gate-all-around structures with 300 nm, 200 nm, and 150 nm gate length. Our method enables us to achieve sub-threshold swings as low as 38 mV/dec at 77 K for a 150 nm gate length.