Optimization of Circuits for IBM's five-qubit Quantum Computers

TL;DR

This paper presents methods for efficiently mapping and optimizing Clifford+T quantum circuits on IBM's five-qubit quantum computers, reducing gate count and circuit depth to improve fidelity.

Contribution

It introduces an algorithm and circuit identities for optimizing Clifford+T circuits specifically for IBM's five-qubit architectures, enhancing performance.

Findings

Optimized circuits significantly reduce gate count.

Optimized circuits decrease circuit depth.

Improved circuit fidelity observed.

Abstract

IBM has made several quantum computers available to researchers around the world via cloud services. Two architectures with five qubits, one with 16, and one with 20 qubits are available to run experiments. The IBM architectures implement gates from the Clifford+T gate library. However, each architecture only implements a subset of the possible CNOT gates. In this paper, we show how Clifford+T circuits can efficiently be mapped into the two IBM quantum computers with 5 qubits. We further present an algorithm and a set of circuit identities that may be used to optimize the Clifford+T circuits in terms of gate count and number of levels. It is further shown that the optimized circuits can considerably reduce the gate count and number of levels and thus produce results with better fidelity.