Gate-Based High Fidelity Spin Read-out in a CMOS Device

TL;DR

This paper demonstrates a high-fidelity, scalable spin readout method in a CMOS device using gate reflectometry, achieving over 99% fidelity at 1 ms integration time and operational up to 0.5 K, advancing quantum-classical integration.

Contribution

The work introduces a robust, high-fidelity spin readout technique in CMOS technology leveraging gate reflectometry and a latched spin blockade mechanism, suitable for scalable quantum computing.

Findings

Achieved spin readout fidelity above 99%.

Readout operation remains effective up to 0.5 K.

Demonstrated scalability in a CMOS device architecture.

Abstract

The engineering of electron spin qubits in a compact unit cell embedding all quantum functionalities is mandatory for large scale integration. In particular, the development of a high-fidelity and scalable spin readout method remains an open challenge. Here we demonstrate high-fidelity and robust spin readout based on gate reflectometry in a CMOS device comprising one qubit dot and one ancillary dot coupled to an electron reservoir to perform readout. This scalable method allows us to read out a spin with a fidelity above 99% for 1 ms integration time. To achieve such fidelity, we exploit a latched spin blockade mechanism that requires electron exchange between the ancillary dot and the reservoir. We show that the demonstrated high read-out fidelity is fully preserved up to 0.5 K. This results holds particular relevance for the future co-integration of spin qubits and classical control electronics.