FATALIC: A novel CMOS front-end readout ASIC for the ATLAS Tile Calorimeter
S. Angelidakis, W.M. Barbe, R. Bonnefoy, H. Chanal, C. Fayard, R., Madar, S. Manen, M.-L. Mercier, E. Nibigira, D. Pallin, N. Pillet, L. Royer,, A. Soulier, R. Vanda\"ele, F. Vazeille

TL;DR
This paper presents FATALIC, a radiation-tolerant CMOS ASIC designed for the ATLAS Tile Calorimeter upgrade, integrating analog and digital processing to improve detector readout in high-luminosity conditions.
Contribution
Introduction of a novel radiation-tolerant ASIC architecture with integrated analog and digital processing for particle detector readout.
Findings
Successful prototype testing under real particle beam conditions
Demonstrated reliable performance and radiation tolerance
Potential for improved detector signal processing
Abstract
The present article introduces a novel ASIC architecture, designed in the context of the ATLAS Tile Calorimeter upgrade program for the High-Luminosity phase of the Large Hadron Collider at CERN. The architecture is based on radiation-tolerant 130 nm Complementary Metal-Oxide-Semiconductor technology, embedding both analog and digital processing of detector signals. A detailed description of the ASIC is given in terms of motivation, design characteristics and simulated and measured performance. Experimental studies, based on 24 prototype units under real particle beam conditions are also presented in order to demonstrate the potential of the architecture as a reliable front-end readout electronic solution.
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