Neuromorphic Architecture for the Hierarchical Temporal Memory
Abdullah M. Zyarah, Dhireesha Kudithipudi

TL;DR
This paper presents a comprehensive hardware architecture for Hierarchical Temporal Memory (HTM), demonstrating high accuracy and significant speedup on datasets like MNIST and EUNF, paving the way for hardware-based self-learning systems.
Contribution
The paper introduces a full-scale HTM hardware architecture with synthetic synapses, achieving high accuracy and speed, and validating its effectiveness on multiple datasets with noise.
Findings
91.16% accuracy on MNIST
90% accuracy on noisy EUNF
1364X speedup over software implementation
Abstract
A biomimetic machine intelligence algorithm, that holds promise in creating invariant representations of spatiotemporal input streams is the hierarchical temporal memory (HTM). This unsupervised online algorithm has been demonstrated on several machine-learning tasks, including anomaly detection. Significant effort has been made in formalizing and applying the HTM algorithm to different classes of problems. There are few early explorations of the HTM hardware architecture, especially for the earlier version of the spatial pooler of HTM algorithm. In this article, we present a full-scale HTM architecture for both spatial pooler and temporal memory. Synthetic synapse design is proposed to address the potential and dynamic interconnections occurring during learning. The architecture is interweaved with parallel cells and columns that enable high processing speed for the HTM. The proposed…
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Taxonomy
MethodsSPEED: Separable Pyramidal Pooling EncodEr-Decoder for Real-Time Monocular Depth Estimation on Low-Resource Settings
