Exploiting DRAM Latency Variations for Generating True Random Numbers
B. M. S. Bahar Talukder, Joseph Kerns, Biswajit Ray, Thomas Morris,, and Md Tauhidur Rahman

TL;DR
This paper introduces a novel DRAM-latency based true random number generator that produces high-quality, robust, and efficient random numbers suitable for security applications, overcoming limitations of previous DRAM-based TRNGs.
Contribution
The paper presents a new DRAM-latency based TRNG that achieves high entropy and throughput, demonstrating robustness across different conditions with real silicon results.
Findings
Robustness against environmental variations
High-quality random numbers with acceptable throughput
Validated on Samsung and Micron DDR3 DRAM modules
Abstract
True random number generator (TRNG) plays a vital role in a variety of security applications and protocols. The security and privacy of an asset rely on the encryption, which solely depends on the quality of random numbers. Memory chips are widely used for generating random numbers because of their prevalence in modern electronic systems. Unfortunately, existing Dynamic Random-access Memory (DRAM)-based TRNGs produce random numbers with either limited entropy or poor throughput. In this paper, we propose a DRAM-latency based TRNG that generates high-quality random numbers. The silicon results from Samsung and Micron DDR3 DRAM modules show that our proposed DRAM-latency based TRNG is robust (against different operating conditions and environmental variations) and acceptably fast.
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