1/f Noise Reduction using In-Pixel Chopping in CMOS Image Sensor

TL;DR

This paper introduces an in-pixel chopping method in CMOS image sensors to significantly reduce 1/f noise, thereby improving image quality and dynamic range with minimal additional circuitry.

Contribution

The paper presents a novel in-pixel chopping technique that reduces 1/f noise in CMOS image sensors by modifying the standard 3T pixel architecture with only one extra transistor.

Findings

Achieved approximately 22 dB reduction in 1/f noise at 50 MHz chopping frequency.

Enhanced dynamic range of the image sensor due to noise reduction.

Implemented and tested in 0.18 um CMOS technology with successful results.

Abstract

In this paper, an in-pixel chopping technique to reduce the low-frequency or 1/f noise of the source follower (SF) transistor in an active pixel sensor (APS) is presented. The SF low-frequency noise is modulated at higher frequencies through chopping, implemented inside the pixel, and in later stage eliminated using low-pass filtering. To implement the chopping, the conventional 3T APS architecture is modified, with only one additional transistor of minimum size per pixel. Reduction in the noise also enhances the dynamic range (DR) of the image sensor. The test circuit is fabricated in UMC 0.18 um standard CMOS technology. The measured results show a reduction of 1/f noise by approximately 22 dB for 50 MHz chopping frequency.