Delay Monitor Circuit for Sensitive Nodes in SRAM-Based FPGA

TL;DR

This paper introduces a new delay monitor circuit for SRAM-based FPGAs that detects extra delays on sensitive nodes caused by transient ionizing radiation, enhancing reliability in radiation-prone environments.

Contribution

The paper proposes a novel monitor circuit architecture specifically designed for detecting delay anomalies in SRAM-based FPGA nodes under radiation effects.

Findings

Successfully detects delay variations caused by ionizing radiation.

Demonstrates effectiveness of the monitor circuit in high-frequency FPGA environments.

Provides a new approach for radiation-induced delay monitoring in FPGAs.

Abstract

This paper presents a novel monitor circuit architecture and experiments performed for detection of extra combinational delays in a high frequency SRAM-Based FPGA on delay sensitive nodes due to transient ionizing radiation.