TL;DR
This paper presents the first FPGA implementation of the Lyra2 hashing algorithm, optimizing its design for use in cryptocurrencies that seek ASIC resistance by leveraging specific algorithm properties.
Contribution
It introduces an FPGA core for Lyra2, demonstrating how to exploit algorithm properties for optimized hardware implementation.
Findings
Achieved an efficient FPGA implementation of Lyra2
Optimized design exploits specific algorithm properties
Potential for improved ASIC-resistant cryptocurrency mining hardware
Abstract
Lyra2REv2 is a hashing algorithm that consists of a chain of individual hashing algorithms and it is used as a proof-of-work function in several cryptocurrencies that aim to be ASIC-resistant. The most crucial hashing algorithm in the Lyra2REv2 chain is a specific instance of the general Lyra2 algorithm. In this work we present the first FPGA implementation of the aforementioned instance of Lyra2 and we explain how several properties of the algorithm can be exploited in order to optimize the design.
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