IDSAC - IUCAA Digital Sampler Array Controller
Sabyasachi Chattopadhyay, Pravin Chordia, A. N. Ramaprakash, Mahesh P., Burse, Bhushan Joshi, Kalpesh Chillal

TL;DR
IDSAC is a flexible, scalable CCD controller for ground-based astronomy that uses digital correlated double sampling (DCDS) to achieve low noise and high performance in controlling CCDs and CMOS detectors.
Contribution
This paper introduces IDSAC, a novel CCD controller with a reconfigurable FPGA-based architecture and digital CDS implementation, enhancing noise reduction and flexibility over traditional analog systems.
Findings
Analytical noise model accurately predicts system noise within 10%.
Digital CDS reduces electronics complexity and improves readout speed.
System successfully controls multiple CCDs with low noise performance.
Abstract
IUCAA Digital Sampling Array Controller (IDSAC) is a generic CCD Controller which is flexible and powerful enough to control a wide variety of CCDs and CMOS detectors used for ground-based astronomy. It has a fully scalable architecture, which can control multiple CCDs and can be easily expanded. The controller has a modular backplane architecture consists of Single Board Controller Cards (SBCs) and can control a mosaic or independent of 5 CCDs. Key features of IDSAC contains usage of FPGA as a reconfigurable master controller, implementation of Digital CDS to achieve low noise and ability to process upto four CCD output at 1Mpixels/Sec/Channel with 16-bit resolution. The best feature of IDSAC is it uses the technique of Digital Correlated Double Sampling(DCDS). It is known that CCD video output is dominated by thermal KTC noise contributed from the summing well capacitor of the CCD…
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