Multicore architecture and cache optimization techniques for solving graph problems

TL;DR

This paper explores how multicore architectures and cache optimization techniques can be leveraged to efficiently solve large-scale graph problems in the context of Big Data and IoT, aiming to reduce analysis time.

Contribution

It investigates methods to exploit multicore and co-processor architectures specifically for improving the performance of graph problem solutions.

Findings

Techniques to utilize multicore architectures for graph processing.

Potential speedup through cache optimization in multicore systems.

Analysis of hardware advantages for large data set processing.

Abstract

With the advent of era of Big Data and Internet of Things, there has been an exponential increase in the availability of large data sets. These data sets require in-depth analysis that provides intelligence for improvements in methods for academia and industry. Majority of the data sets are represented and available in the form of graphs. Therefore, the problem at hand is to address solving graph problems. Since the data sets are large, the time it takes to analyze the data is significant. Hence, in this paper, we explore techniques that can exploit existing multicore architecture to address the issue. Currently, most Central Processing Units have incorporated multicore design; in addition, co-processors such as Graphics Processing Units have large number of cores that can used to gain significant speedup. Therefore, in this paper techniques to exploit the advantages of multicore architecture is studied.