Neuro-memristive Circuits for Edge Computing: A review

TL;DR

This review explores neuromorphic CMOS-memristive circuits designed for edge computing, highlighting their benefits, challenges, and potential to enhance data processing efficiency at lower power levels.

Contribution

It provides a comprehensive overview of neuro-memristive architectures, analyzing their advantages, limitations, and open research problems for edge computing applications.

Findings

Neuromorphic architectures improve edge device efficiency.

Memristive circuits offer low-power data processing.

Open problems include scalability and integration challenges.

Abstract

The volume, veracity, variability, and velocity of data produced from the ever-increasing network of sensors connected to Internet pose challenges for power management, scalability, and sustainability of cloud computing infrastructure. Increasing the data processing capability of edge computing devices at lower power requirements can reduce several overheads for cloud computing solutions. This paper provides the review of neuromorphic CMOS-memristive architectures that can be integrated into edge computing devices. We discuss why the neuromorphic architectures are useful for edge devices and show the advantages, drawbacks and open problems in the field of neuro-memristive circuits for edge computing.