High-Performance Parallel Implementation of Genetic Algorithm on FPGA

TL;DR

This paper presents a high-performance parallel FPGA implementation of genetic algorithms aimed at reducing processing time and optimizing resource use for complex search problems.

Contribution

It introduces a novel FPGA-based parallel architecture for genetic algorithms, improving speed and scalability over traditional sequential implementations.

Findings

Significant reduction in processing time for large populations.

Efficient FPGA resource utilization across different population sizes.

Maintained accuracy in function optimization despite hardware adjustments.

Abstract

Genetic Algorithms (GAs) are used to solve search and optimization problems in which an optimal solution can be found using an iterative process with probabilistic and non-deterministic transitions. However, depending on the problem's nature, the time required to find a solution can be high in sequential machines due to the computational complexity of genetic algorithms. This work proposes a parallel implementation of a genetic algorithm on field-programmable gate array (FPGA). Optimization of the system's processing time is the main goal of this project. Results associated with the processing time and area occupancy (on FPGA) for various population sizes are analyzed. Studies concerning the accuracy of the GA response for the optimization of two variables functions were also evaluated for the hardware implementation. However, the high-performance implementation proposes in this paper is able to work with more variable from some adjustments on hardware architecture.