Real-time Data Acquisition and Processing System for MHz Repetition Rate Image Sensors
Aleksander Mielczarek (1), Dariusz Makowski (1), Andrzej Napieralski, (1), Christopher Gerth (2), Bernd Steffen (2) ((1) Lodz University of, Technology, (2) Deutsches Elektronen-Synchrotron)

TL;DR
This paper introduces HOLD, a high-speed FPGA-based data acquisition system for MHz repetition rate image sensors, significantly increasing frame capture rates for particle accelerator beam analysis.
Contribution
Development of a novel FPGA-based high-speed data acquisition system (HOLD) that achieves at least ten times higher frame rates than existing solutions.
Findings
HOLD captures at least 10 times more frames per second than comparable devices.
The system effectively handles large data streams with low latency.
It is implemented as an FPGA Mezzanine Card (FMC) with a custom architecture.
Abstract
One of the optimization goals of a particle accelerator is to reach the highest possible beam peak current. For that to happen the electron bunch propagating through the accelerator should be kept relatively short along the direction of its travel. In order to obtain a better understanding of the beam composition it is crucial to evaluate the electric charge distribution along the micrometer-scale packets. The task of the Electro-Optic Detector (EOD) is to imprint the beam charge profile on the spectrum of light of a laser pulse. The actual measurement of charge distribution is then extracted with a spectrometer based on a diffraction grating. The article focuses on developed data acquisition and processing system called the High-speed Optical Line Detector (HOLD). It is a 1D image acquisition system which solves several challenges related to capturing, buffering, processing and…
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