Two-terminal spin-orbit torque magnetoresistive random access memory

TL;DR

This paper introduces a two-terminal spin-orbit torque MRAM device that reduces the critical write current by over 70% compared to traditional STT-MRAM, enabling faster and more efficient non-volatile memory operation.

Contribution

The work presents a novel two-terminal SOT-MRAM cell with a simplified architecture and significantly lower switching current, advancing the development of faster, more efficient magnetic memory.

Findings

Critical write current reduced by over 70%

Switching dominated by spin-orbit torque mechanisms

Comparable performance to three-terminal SOT-MRAM devices

Abstract

Spin-transfer torque magnetoresistive random access memory (STT-MRAM) is an attractive alternative to current random access memory technologies due to its non-volatility, fast operation and high endurance. STT-MRAM does though have limitations including the stochastic nature of the STT-switching and a high critical switching current, which makes it unsuitable for ultrafast operation at nanosecond and sub-nanosecond regimes. Spin-orbit torque (SOT) switching, which relies on the torque generated by an in-plane current, has the potential to overcome these limitations. However, SOT-MRAM cells studied so far use a three-terminal structure in order to apply the in-plane current, which increases the size of the cells. Here we report a two-terminal SOT-MRAM cell based on a CoFeB/MgO magnetic tunnel junction pillar on an ultrathin and narrow Ta underlayer. In this device, an in-plane and out-of-plane current are simultaneously generated upon application of a voltage, and we demonstrate that the switching mechanism is dominated by SOT. We also compare our device to a STT-MRAM cell built with the same architecture and show that critical write current in the SOT-MRAM cell is reduced by more than 70%.