Clock Distribution and Readout Architecture for the ATLAS Tile Calorimeter at the HL-LHC

TL;DR

This paper presents the design and validation of a new clock distribution and readout architecture for the ATLAS Tile Calorimeter upgrade at the HL-LHC, enabling high-speed data transfer and synchronization.

Contribution

It introduces a fully digital clock distribution and readout system for the TileCal upgrade, validated through extensive testing and beam campaigns.

Findings

Achieved 40 Tbps data bandwidth for detector readout.

Validated clock synchronization with LHC timing using prototypes.

Demonstrated system performance in test beam campaigns.

Abstract

The Tile Calorimeter (TileCal) is one detector of the ATLAS experiment at the Large Hadron Collider (LHC). TileCal is a sampling calorimeter made of steel plates and plastic scintillators which are readout using approximately 10,000 PhotoMultipliers Tubes (PMTs). In 2024, the LHC will undergo a series of upgrades towards a High Luminosity LHC (HL-LHC) to deliver up to 7.5 times the current nominal instantaneous luminosity. The ATLAS Tile Phase II Upgrade will accommodate detector and Data AcQuisition (DAQ) system to the HL-LHC requirements. The detector electronics will be redesigned using a new clock distribution and readout architecture with a full-digital trigger system. After the Long Shutdown 3 (2024-2026), the on-detector electronics will transfer digitized data for every bunch crossing (~25 ns) to the Tile PreProcessors (TilePPr) in the counting rooms with a total data bandwidth of 40 Tbps. The TilePPrs will store the detector data in pipeline memories to cope with the new ATLAS DAQ architecture requirements, and will interface with the Front End Link eXchange (FELIX) system and the first trigger level. The TilePPr boards will distribute the sampling clock to the on-detector electronics for synchronization with the LHC clock using high-speed links configured for fixed and deterministic latency. The upgraded readout and clock distribution strategy was fully validated in a Demonstrator system using prototypes of the upgraded electronics in several test beam campaigns between 2015 and 2018.