New version of high performance Compute Node for PANDA Streaming DAQ system

TL;DR

This paper presents a new high-performance compute node for the PANDA streaming data acquisition system, enabling efficient data handling, filtering, and processing for high-rate particle physics experiments.

Contribution

It introduces a new version of the FPGA-based Compute Node with enhanced data transmission, buffering, and processing capabilities for the PANDA experiment's DAQ system.

Findings

Successful prototype testing demonstrating high data throughput

Enhanced buffering supports complex decision algorithms

Reliable high-speed data transmission achieved

Abstract

PANDA is one of the major experiments currently under construction at FAIR/Darmstadt. Its focus is physics with high intensity and high quality anti-proton beams with momenta up to 15 GeV/c. Event rates up to 20MHz, and a typical event size between 1.5 KB and 4.5 KB. lead to data rates as high as 200 GB/s. A trigger-less streaming DAQ system is introduced in this paper, featuring event filtering based on FPGAs and a CPU/GPU farm. The Compute Node (CN) is the central board FPGA based component in this system. A new version of the ATCA based CN is presented. Its main features include high speed data transmission, massive data buffering capabilities to support large latency for complex decion algorithms, high performance data processing and ethernet connectivity. First test results with a prototype are presented.