A Modulo-Based Architecture for Analog-to-Digital Conversion

TL;DR

This paper introduces a novel modulo-based analog-to-digital conversion architecture that reduces the number of bits needed by exploiting modulo operations and statistical decoding, approaching theoretical limits.

Contribution

It proposes a universal modulo ADC architecture with a ring oscillator implementation that minimizes bits per sample by leveraging signal statistics.

Findings

Performance approaches rate-distortion limits

Numerical demonstrations validate the architecture

Modulo operation reduces dynamic range requirements

Abstract

Systems that capture and process analog signals must first acquire them through an analog-to-digital converter. While subsequent digital processing can remove statistical correlations present in the acquired data, the dynamic range of the converter is typically scaled to match that of the input analog signal. The present paper develops an approach for analog-to-digital conversion that aims at minimizing the number of bits per sample at the output of the converter. This is attained by reducing the dynamic range of the analog signal by performing a modulo operation on its amplitude, and then quantizing the result. While the converter itself is universal and agnostic of the statistics of the signal, the decoder operation on the output of the quantizer can exploit the statistical structure in order to unwrap the modulo folding. The performance of this method is shown to approach information theoretical limits, as captured by the rate-distortion function, in various settings. An architecture for modulo analog-to-digital conversion via ring oscillators is suggested, and its merits are numerically demonstrated.