Investigation of Ta2O5 as an alternative high \k{appa} dielectric for InAlN/GaN MOS HEMT on Si

TL;DR

This study demonstrates Ta2O5 as a promising high-ppa dielectric for InAlN/GaN MOS HEMT on Si, showing significantly reduced gate leakage and optimized interface properties through annealing.

Contribution

It introduces the use of sputter-deposited Ta2O5 as a high-ppa dielectric for InAlN/GaN MOS HEMT on Si and investigates optimal annealing conditions for improved device performance.

Findings

Gate leakage reduced by five orders of magnitude at -15 V

Optimal annealing at 500B0C improves interface quality

Ta2O5 film shows Ta:O ratio of 0.41 after annealing

Abstract

We report on the demonstration and investigation of Ta2O5 as high-\k{appa} dielectric for InAlN/GaN-MOS HEMT-on-Si. Ta2O5 of thickness 24 nm and dielectric constant ~ 30 was sputter deposited on InAlN/GaN HEMT and was investigated for different post deposition anneal conditions (PDA). The gate leakage was 16nA/mm at -15 V which was ~ 5 orders of magnitude lower compared to reference HEMT. The 2-dimensional electron gas (2DEG) density was found to vary with annealing temperature suggesting the presence of net charge at the Ta2O5/InAlN interface. Dispersion in the capacitance-voltage (C-V) characteristics was used to estimate the frequency-dependent interface charge while energy band diagrams under flat band conditions were investigated to estimate fixed charge. The optimum anneal condition was found to be 500{\deg} C which has resulted into a flat band voltage spread (VFB) of 0.4 V and interface fix charge (Qf) of 3.98x10^13 cm-2. XPS (X-ray photoelectron spectroscopy) spectra of as deposited and annealed Ta2O5 film were analyzed for Ta and O compositions in the film. The sample annealed at 500{\deg} C has shown Ta:O ratio of 0.41.XRD (X-ray diffraction) analysis was done to check the evolution of poly-crystallization of the Ta2O5 film at higher annealing temperatures.