Design of 32-channel TDC Based on Single FPGA for {\mu}SR Spectrometer at CSNS
Fanshui Deng, Hao Liang, Bangjiao Ye, and Jingyu Tang

TL;DR
This paper presents a 32-channel FPGA-based TDC for {}SR spectrometers at CSNS, achieving high precision, flexible configuration, and efficient data transmission for material microstructure studies.
Contribution
The design introduces a multi-channel, high-precision TDC with real-time configurability and calibration, tailored for {}SR spectrometer applications.
Findings
FWHM precision better than 273 ps per channel
Deep hit-buffer capacity up to 512 signals
Linear response with low temperature sensitivity
Abstract
Muon Spin Rotation, Relaxation and Resonance ({\mu}SR) technology has an irreplaceable role in studying the microstructure and properties of materials, especially micro-magnetic properties. An experimental muon source is being built in China Spallation Neutron Source (CSNS) now. At the same time, a 128-channel {\mu}SR spectrometer as China's first {\mu}SR spectrometer is being developed. The time spectrum of {\mu}SR can be obtained by fitting the curve of positron count rate with time. This paper presents a 32-channel Time-to-Digital Converter (TDC) implemented in a Xilinx Virtex-6 Field Programmable Gate Array (FPGA) for measuring the positron's flight time of {\mu}SR Spectrometer. Signal of each channel is sampled by 16 equidistant shifted-phase 200 MHz sampling clocks, so the TDC bin size is 312.5ps. The measuring range is up to 327us. This TDC has the ability to store multiple hit…
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Taxonomy
TopicsMuon and positron interactions and applications · Radiation Effects and Dosimetry · Particle accelerators and beam dynamics
