Pulse sequence designed for robust C-phase gates in SiMOS and Si/SiGe double quantum dots

TL;DR

This paper proposes a simple pulse sequence to significantly reduce errors in C-phase gates for silicon-based spin qubits, improving fidelity and robustness against charge noise and $1/f$ noise, with practical experimental implications.

Contribution

The authors introduce a novel pulse sequence that suppresses exchange coupling errors in silicon quantum dots, achieving two orders of magnitude fidelity improvement based on experimental error modeling.

Findings

C-phase infidelity is about 2.5 times the single-qubit infidelity.

The pulse sequence suppresses errors by two orders of magnitude.

Effective against $1/f$ noise with a cutoff below ~1MHz.

Abstract

We theoretically analyze the errors in one- and two-qubit gates in SiMOS and Si/SiGe spin qubit experiments, and present a pulse sequence which can suppress the errors in exchange coupling due to charge noise using ideal local rotations. In practice, the overall fidelity of the pulse sequence will be limited only by the quality of the single-qubit gates available: the C-phase infidelity comes out to be $\approx 2.5 \times$ the infidelity of the single-qubit operations. Based on experimental data, we model the errors and show that C-phase gate infidelities can be suppressed by two orders in magnitude. Our pulse sequence is simple and we expect an experimental implementation would be relatively straightforward. We also evaluate the performance of this gate against $1/f$ noise. Assuming a soft ultraviolet cutoff, we show that the pulse sequence designed for quasistatic noise still performs well when the cutoff occurs below $\sim 1$MHz given fast enough one-qubit Rabi frequencies, suppressing the infidelity by an order of magnitude compared to the existing direct adiabatic protocol. We also analyze the effects of nonadiabaticity during finite rise periods, and find that adiabaticity is not a limitation for the current values of exchange coupling.