A Driver ASIC for Scientific CCD Detectors Using 180nm Technology

TL;DR

This paper presents a custom ASIC designed with 180nm technology to efficiently drive scientific CCD detectors, integrating multi-channel clock and bias voltage generation to reduce system size and improve performance.

Contribution

It introduces a novel ASIC design that combines multi-channel clock and bias voltage outputs for CCD detectors using 180nm BCDlite technology, enhancing integration and miniaturization.

Findings

ASIC successfully fabricated and tested

Provides multi-channel clock and bias voltage outputs

Reduces size of CCD detector system

Abstract

In order to achieve the driver function for several types of scientific CCD detector from E2V Co Ltd, and decreasing the size of electronics of CCD detector system, an Application-specified Integrated Circuit (ASIC) was designed. It provides multi-channel clocks and bias voltage for CCD driver. In the ASIC, the clock drivers are made of a clock switch circuit and high voltage amplifier. Two 8-bit current-steering DACs are used to adjust the driver capability and high-level voltage of clocks. The bias drivers are generated by 8-bit current-steering DACs and off-chip operation amplifiers. The Global Foundry 180 nm BCDlite technology is selected to implement this design. The first version of design has been finished and the tests have been done.