Tunneling in Graphene SymFETs

TL;DR

This paper investigates tunneling mechanisms in graphene-based SymFETs, demonstrating their potential for high-speed, temperature-robust electronic applications through theoretical modeling and analysis of device performance.

Contribution

It introduces a formalism for GIG junctions and analyzes the performance of SymFETs, highlighting their high-speed potential and robustness compared to traditional silicon devices.

Findings

Large tunneling current occurs at Dirac point alignment

SymFET exhibits symmetric I-V characteristics

Device performance improves with increased doping levels

Abstract

With the further scaling of silicon MOSFETs becoming increasingly harder, the search for an alternative material became crucial. The electron device community found many of the answers in two dimensional materials, especially graphene. With an astounding mobility and perfectly symmetrical bandstructure, graphene may be, just the replacement for silicon we have been looking for. In this report, the mechanism of tunneling in a graphene-insulator-graphene (GIG) junction has been studied, by applying Bardeen's transfer Hamiltonian approach. Later, the formalism of the GIG junction has been used to study the performance and current-voltage characteristics of a symmetric tunneling field effect transistor or SymFET. The device exhibits a small tunneling current at most of the biasing voltages. But when the Dirac points of the oppositely doped graphene layers are aligned, a large amount of tunneling current is observed. The performance of the device has been studied for various device dimensions. The resonant current peak is also shown to increase for higher levels of doping. The extraordinary symmetry of the I-V characteristics makes SymFET a potential candidate for high speed analog devices. The SymFET is also shown to be robust to temperature changes, since tunneling is the main mechanism of charge transport. With further study and modifications, the SymFET can become a popular choice for both analog and digital circuit implementation.