CMOS-Memristive Analog Multiplier Design

TL;DR

This paper introduces a CMOS-memristor based four quadrant analog multiplier that enhances processing speed and reduces power consumption compared to traditional resistor and CMOS transistor designs.

Contribution

It presents a novel memristor-based multiplier circuit that improves speed and efficiency while maintaining accurate multiplication.

Findings

Faster processing speed demonstrated in simulations

Reduced power dissipation compared to traditional designs

Stable performance across temperature variations

Abstract

This paper proposes four quadrant analog multiplier using CMOS-memristor circuit. Currently, there are plenty of analog multipliers using resistors and CMOS transistors. They can attain perfect multiplication but have several disadvantages such as lower processing speed, higher power consumption and larger chip areas. Memristor based circuits are introduced to resolve the mentioned drawbacks. In this paper current mode four quadrant multiplier based on squaring circuits is taken as a framework, and CMOS transistors are replaced with memristors. The circuit design is simulated with SPICE, and variability analysis and performance variation with temperature is performed. The proposed circuit allows faster processing with retained data while dissipating less power retaining the multiplication characteristics.