Variability analysis of Memristor-based Sigmoid Function

TL;DR

This paper investigates a memristor-enhanced sigmoid circuit, demonstrating that replacing CMOS transistors with memristors reduces power and area consumption, thus improving efficiency in neural network activation functions.

Contribution

It introduces a modified sigmoid circuit using memristors in place of CMOS transistors, achieving higher density and lower power and area in SPICE simulations.

Findings

7% reduction in power consumption

7% reduction in area

Higher component density

Abstract

Activation functions are widely used in neural networks to decide the activation value of the neural unit based upon linear combinations of the weighted inputs. The effective implementation of activation function is highly important, as they help to represent non-linear complex functional mappings between inputs and outputs of the neural network. One of the non-linear approaches is to use a sigmoid function. Therefore, there is a growing need in enhancing the performance of sigmoid circuits. In this paper, the main objective is to modify existing current mirror based sigmoid model by replacing CMOS transistors with memristor devices. This model was tested varying different circuit parameters, transistor size and temperature. The the area, power and noise in the modified CMOS-memristive sigmoid circuit are shown. The application of memristors in the sigmoid circuit results in higher component density in an on-chip area, allowing a reduction of power and area by 7$\%$. The proposed sigmoid circuit was simulated in SPICE using 180nm TSMC CMOS technology.