Sense amplifier design using CMOS-memristor circuits

TL;DR

This paper explores integrating memristors into CMOS sense amplifiers to enhance area efficiency, power consumption, temperature resilience, and speed, demonstrating potential improvements in memory device performance.

Contribution

It introduces a novel CMOS-memristor hybrid sense amplifier design and evaluates its impact on key performance metrics compared to conventional circuits.

Findings

Reduced power consumption

Smaller on-chip area

Improved temperature resilience

Abstract

With the increase of the speed of computers, timing and power requirements are becoming crucial for memory devices. The main objective of the paper is to modify 180nm CMOS sense amplifier design by using memristive devices and improve the design in terms of on-chip area, power efficiency, resistance to temperatures and speed. To achieve this, NOT gates in the circuit were constructed using memristor and CMOS. The main aim of the paper is to check the effect of memristors on characteristics of sense amplifier. The design was tested on Conventional Current Sense Amplifier (CSA) circuit. Changes in power, area, sensing delay and offset are reported in the paper.